Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7461759 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
64049 |
| auto[1] |
5292135 |
1 |
|
|
T23 |
51458 |
|
T24 |
9 |
|
T26 |
58235 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10567084 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
82339 |
| auto[1] |
2186810 |
1 |
|
|
T23 |
33168 |
|
T24 |
11 |
|
T26 |
20949 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7463876 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
63153 |
| auto[1] |
5290018 |
1 |
|
|
T23 |
52354 |
|
T24 |
12 |
|
T26 |
55688 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1541858 |
1 |
|
|
T23 |
9404 |
|
T24 |
1 |
|
T26 |
16776 |
| auto[1] |
auto[0] |
auto[1] |
1092568 |
1 |
|
|
T23 |
16889 |
|
T24 |
11 |
|
T26 |
10093 |
| auto[1] |
auto[1] |
auto[0] |
1561350 |
1 |
|
|
T23 |
9782 |
|
T26 |
17963 |
|
T29 |
15 |
| auto[1] |
auto[1] |
auto[1] |
1094242 |
1 |
|
|
T23 |
16279 |
|
T26 |
10856 |
|
T29 |
39 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |