Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
2306898 |
1 |
|
|
T23 |
23775 |
|
T26 |
25647 |
|
T29 |
60 |
auto[1] |
auto[0] |
auto[1] |
335365 |
1 |
|
|
T23 |
3160 |
|
T26 |
3333 |
|
T29 |
1 |
auto[1] |
auto[1] |
auto[0] |
2323497 |
1 |
|
|
T23 |
20961 |
|
T26 |
26445 |
|
T29 |
103 |
auto[1] |
auto[1] |
auto[1] |
339549 |
1 |
|
|
T23 |
2722 |
|
T26 |
3574 |
|
T29 |
4 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |