Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7449028 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
63140 |
| auto[1] |
5304866 |
1 |
|
|
T23 |
52367 |
|
T24 |
12 |
|
T26 |
55194 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10569364 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
83557 |
| auto[1] |
2184530 |
1 |
|
|
T23 |
31950 |
|
T24 |
9 |
|
T26 |
21064 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7474101 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
64241 |
| auto[1] |
5279793 |
1 |
|
|
T23 |
51266 |
|
T24 |
18 |
|
T26 |
55837 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1546079 |
1 |
|
|
T23 |
9234 |
|
T24 |
3 |
|
T26 |
18280 |
| auto[1] |
auto[0] |
auto[1] |
1093670 |
1 |
|
|
T23 |
15651 |
|
T24 |
9 |
|
T26 |
11030 |
| auto[1] |
auto[1] |
auto[0] |
1549184 |
1 |
|
|
T23 |
10082 |
|
T24 |
6 |
|
T26 |
16493 |
| auto[1] |
auto[1] |
auto[1] |
1090860 |
1 |
|
|
T23 |
16299 |
|
T26 |
10034 |
|
T29 |
84 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |