Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7443346 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
65538 |
| auto[1] |
5310548 |
1 |
|
|
T23 |
49969 |
|
T24 |
8 |
|
T26 |
56467 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10572288 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
83086 |
| auto[1] |
2181606 |
1 |
|
|
T23 |
32421 |
|
T24 |
1 |
|
T26 |
20692 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7468172 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
64229 |
| auto[1] |
5285722 |
1 |
|
|
T23 |
51278 |
|
T24 |
7 |
|
T26 |
56537 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1541319 |
1 |
|
|
T23 |
9483 |
|
T24 |
3 |
|
T26 |
18660 |
| auto[1] |
auto[0] |
auto[1] |
1079789 |
1 |
|
|
T23 |
16989 |
|
T24 |
1 |
|
T26 |
10180 |
| auto[1] |
auto[1] |
auto[0] |
1562797 |
1 |
|
|
T23 |
9374 |
|
T24 |
3 |
|
T26 |
17185 |
| auto[1] |
auto[1] |
auto[1] |
1101817 |
1 |
|
|
T23 |
15432 |
|
T26 |
10512 |
|
T29 |
77 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |