Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7459640 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
64987 |
| auto[1] |
5294254 |
1 |
|
|
T23 |
50520 |
|
T24 |
25 |
|
T26 |
57698 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10561772 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
83522 |
| auto[1] |
2192122 |
1 |
|
|
T23 |
31985 |
|
T24 |
21 |
|
T26 |
21236 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7455393 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
64082 |
| auto[1] |
5298501 |
1 |
|
|
T23 |
51425 |
|
T24 |
22 |
|
T26 |
55941 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1557423 |
1 |
|
|
T23 |
9622 |
|
T26 |
17275 |
|
T29 |
36 |
| auto[1] |
auto[0] |
auto[1] |
1102198 |
1 |
|
|
T23 |
16608 |
|
T24 |
8 |
|
T26 |
10734 |
| auto[1] |
auto[1] |
auto[0] |
1548956 |
1 |
|
|
T23 |
9818 |
|
T24 |
1 |
|
T26 |
17430 |
| auto[1] |
auto[1] |
auto[1] |
1089924 |
1 |
|
|
T23 |
15377 |
|
T24 |
13 |
|
T26 |
10502 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |