Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7447495 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
68257 |
| auto[1] |
5306399 |
1 |
|
|
T23 |
47250 |
|
T24 |
11 |
|
T26 |
57505 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12087402 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
109728 |
| auto[1] |
666492 |
1 |
|
|
T23 |
5779 |
|
T26 |
6443 |
|
T29 |
6 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7490609 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
65566 |
| auto[1] |
5263285 |
1 |
|
|
T23 |
49941 |
|
T24 |
12 |
|
T26 |
56605 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2291930 |
1 |
|
|
T23 |
23306 |
|
T24 |
6 |
|
T26 |
25014 |
| auto[1] |
auto[0] |
auto[1] |
331562 |
1 |
|
|
T23 |
3118 |
|
T26 |
3281 |
|
T29 |
2 |
| auto[1] |
auto[1] |
auto[0] |
2304863 |
1 |
|
|
T23 |
20856 |
|
T24 |
6 |
|
T26 |
25148 |
| auto[1] |
auto[1] |
auto[1] |
334930 |
1 |
|
|
T23 |
2661 |
|
T26 |
3162 |
|
T29 |
4 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |