cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59429 |
1 |
|
|
T12 |
2036 |
|
T115 |
516 |
|
T116 |
366 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46280 |
1 |
|
|
T12 |
1319 |
|
T115 |
377 |
|
T116 |
205 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
66150 |
1 |
|
|
T12 |
1498 |
|
T115 |
1196 |
|
T116 |
1204 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47013 |
1 |
|
|
T12 |
1398 |
|
T115 |
382 |
|
T116 |
202 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T12 |
22 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1731 |
1 |
|
|
T12 |
66 |
|
T115 |
19 |
|
T116 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
805 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1731 |
1 |
|
|
T12 |
64 |
|
T115 |
21 |
|
T116 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T12 |
22 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1691 |
1 |
|
|
T12 |
63 |
|
T115 |
19 |
|
T116 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
805 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T12 |
64 |
|
T115 |
21 |
|
T116 |
11 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T12 |
22 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1653 |
1 |
|
|
T12 |
58 |
|
T115 |
19 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T12 |
63 |
|
T115 |
21 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T12 |
22 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T12 |
57 |
|
T115 |
19 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T12 |
60 |
|
T115 |
21 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T12 |
22 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T12 |
57 |
|
T115 |
18 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T12 |
59 |
|
T115 |
21 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T12 |
22 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T12 |
55 |
|
T115 |
17 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T12 |
59 |
|
T115 |
21 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T12 |
22 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T12 |
54 |
|
T115 |
15 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T12 |
24 |
|
T115 |
9 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T12 |
57 |
|
T115 |
22 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T12 |
22 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T12 |
52 |
|
T115 |
14 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T12 |
24 |
|
T115 |
9 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T12 |
56 |
|
T115 |
22 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T12 |
22 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T12 |
51 |
|
T115 |
14 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T12 |
24 |
|
T115 |
9 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T12 |
56 |
|
T115 |
22 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T12 |
22 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T12 |
51 |
|
T115 |
13 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T12 |
24 |
|
T115 |
9 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T12 |
53 |
|
T115 |
20 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T12 |
22 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T12 |
51 |
|
T115 |
13 |
|
T116 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T12 |
24 |
|
T115 |
9 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T12 |
52 |
|
T115 |
19 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T12 |
22 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T12 |
49 |
|
T115 |
13 |
|
T116 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T12 |
24 |
|
T115 |
9 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T12 |
49 |
|
T115 |
19 |
|
T116 |
10 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T12 |
22 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T12 |
49 |
|
T115 |
12 |
|
T116 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T12 |
24 |
|
T115 |
9 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T12 |
48 |
|
T115 |
16 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T12 |
22 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T12 |
48 |
|
T115 |
12 |
|
T116 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T12 |
24 |
|
T115 |
9 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T12 |
48 |
|
T115 |
15 |
|
T116 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T12 |
22 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T12 |
47 |
|
T115 |
12 |
|
T116 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T12 |
24 |
|
T115 |
9 |
|
T116 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T12 |
48 |
|
T115 |
15 |
|
T116 |
8 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60261 |
1 |
|
|
T12 |
1944 |
|
T115 |
558 |
|
T116 |
411 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50451 |
1 |
|
|
T12 |
871 |
|
T115 |
1078 |
|
T116 |
391 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62602 |
1 |
|
|
T12 |
2668 |
|
T115 |
609 |
|
T116 |
1013 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45843 |
1 |
|
|
T12 |
1011 |
|
T115 |
321 |
|
T116 |
203 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1746 |
1 |
|
|
T12 |
51 |
|
T115 |
17 |
|
T116 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1740 |
1 |
|
|
T12 |
52 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1705 |
1 |
|
|
T12 |
50 |
|
T115 |
17 |
|
T116 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1709 |
1 |
|
|
T12 |
50 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1661 |
1 |
|
|
T12 |
49 |
|
T115 |
15 |
|
T116 |
12 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T12 |
49 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T12 |
49 |
|
T115 |
15 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T12 |
49 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T12 |
49 |
|
T115 |
15 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T12 |
48 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T12 |
48 |
|
T115 |
15 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T12 |
46 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T12 |
47 |
|
T115 |
14 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T12 |
26 |
|
T115 |
9 |
|
T116 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T12 |
45 |
|
T115 |
18 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T12 |
46 |
|
T115 |
14 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T12 |
26 |
|
T115 |
9 |
|
T116 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T12 |
44 |
|
T115 |
18 |
|
T116 |
10 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T12 |
45 |
|
T115 |
13 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T12 |
26 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T12 |
43 |
|
T115 |
18 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T12 |
43 |
|
T115 |
12 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T12 |
26 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T12 |
40 |
|
T115 |
18 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T12 |
41 |
|
T115 |
12 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T12 |
26 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T12 |
38 |
|
T115 |
17 |
|
T116 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T12 |
38 |
|
T115 |
10 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T12 |
26 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T12 |
38 |
|
T115 |
16 |
|
T116 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T12 |
37 |
|
T115 |
8 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T12 |
26 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T12 |
36 |
|
T115 |
15 |
|
T116 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T12 |
35 |
|
T115 |
8 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T12 |
26 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T12 |
36 |
|
T115 |
15 |
|
T116 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T12 |
33 |
|
T115 |
8 |
|
T116 |
11 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T12 |
26 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T12 |
36 |
|
T115 |
15 |
|
T116 |
8 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59105 |
1 |
|
|
T12 |
2906 |
|
T115 |
412 |
|
T116 |
331 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48942 |
1 |
|
|
T12 |
1126 |
|
T115 |
459 |
|
T116 |
1095 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61488 |
1 |
|
|
T12 |
1608 |
|
T115 |
916 |
|
T116 |
149 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49115 |
1 |
|
|
T12 |
1059 |
|
T115 |
616 |
|
T116 |
363 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1778 |
1 |
|
|
T12 |
42 |
|
T115 |
24 |
|
T116 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T12 |
25 |
|
T115 |
9 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1784 |
1 |
|
|
T12 |
42 |
|
T115 |
24 |
|
T116 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1752 |
1 |
|
|
T12 |
41 |
|
T115 |
24 |
|
T116 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T12 |
25 |
|
T115 |
9 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1757 |
1 |
|
|
T12 |
41 |
|
T115 |
24 |
|
T116 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1721 |
1 |
|
|
T12 |
41 |
|
T115 |
24 |
|
T116 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T12 |
25 |
|
T115 |
9 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1722 |
1 |
|
|
T12 |
41 |
|
T115 |
24 |
|
T116 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T12 |
41 |
|
T115 |
23 |
|
T116 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T12 |
25 |
|
T115 |
9 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1685 |
1 |
|
|
T12 |
40 |
|
T115 |
24 |
|
T116 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T12 |
41 |
|
T115 |
23 |
|
T116 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T12 |
25 |
|
T115 |
9 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T12 |
38 |
|
T115 |
24 |
|
T116 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T12 |
41 |
|
T115 |
23 |
|
T116 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T12 |
25 |
|
T115 |
9 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T12 |
38 |
|
T115 |
24 |
|
T116 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T12 |
40 |
|
T115 |
23 |
|
T116 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T12 |
25 |
|
T115 |
9 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T12 |
38 |
|
T115 |
24 |
|
T116 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T12 |
38 |
|
T115 |
22 |
|
T116 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T12 |
25 |
|
T115 |
9 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T12 |
38 |
|
T115 |
24 |
|
T116 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T12 |
36 |
|
T115 |
21 |
|
T116 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T12 |
25 |
|
T115 |
9 |
|
T116 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T12 |
38 |
|
T115 |
23 |
|
T116 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T12 |
34 |
|
T115 |
20 |
|
T116 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T12 |
25 |
|
T115 |
9 |
|
T116 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T12 |
38 |
|
T115 |
21 |
|
T116 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T12 |
34 |
|
T115 |
19 |
|
T116 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T12 |
38 |
|
T115 |
21 |
|
T116 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T12 |
33 |
|
T115 |
19 |
|
T116 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T12 |
37 |
|
T115 |
20 |
|
T116 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T12 |
32 |
|
T115 |
19 |
|
T116 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T12 |
37 |
|
T115 |
18 |
|
T116 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T12 |
32 |
|
T115 |
19 |
|
T116 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T12 |
37 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T12 |
32 |
|
T115 |
18 |
|
T116 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T12 |
37 |
|
T115 |
16 |
|
T116 |
11 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58703 |
1 |
|
|
T12 |
1561 |
|
T115 |
1273 |
|
T116 |
620 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48484 |
1 |
|
|
T12 |
1147 |
|
T115 |
417 |
|
T116 |
244 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
65005 |
1 |
|
|
T12 |
2490 |
|
T115 |
575 |
|
T116 |
938 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47568 |
1 |
|
|
T12 |
1323 |
|
T115 |
274 |
|
T116 |
231 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1727 |
1 |
|
|
T12 |
55 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1736 |
1 |
|
|
T12 |
51 |
|
T115 |
20 |
|
T116 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1693 |
1 |
|
|
T12 |
55 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1707 |
1 |
|
|
T12 |
51 |
|
T115 |
18 |
|
T116 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1671 |
1 |
|
|
T12 |
55 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T12 |
51 |
|
T115 |
18 |
|
T116 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T12 |
55 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1661 |
1 |
|
|
T12 |
50 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T12 |
53 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T12 |
45 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T12 |
51 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T12 |
45 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T12 |
50 |
|
T115 |
16 |
|
T116 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T12 |
41 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T12 |
49 |
|
T115 |
16 |
|
T116 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T12 |
41 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T12 |
47 |
|
T115 |
15 |
|
T116 |
10 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T12 |
41 |
|
T115 |
17 |
|
T116 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T12 |
47 |
|
T115 |
15 |
|
T116 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T12 |
25 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T12 |
40 |
|
T115 |
16 |
|
T116 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T12 |
47 |
|
T115 |
15 |
|
T116 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T12 |
25 |
|
T115 |
7 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T12 |
37 |
|
T115 |
16 |
|
T116 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T12 |
47 |
|
T115 |
15 |
|
T116 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T12 |
25 |
|
T115 |
7 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T12 |
36 |
|
T115 |
15 |
|
T116 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T12 |
47 |
|
T115 |
15 |
|
T116 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T12 |
25 |
|
T115 |
7 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T12 |
36 |
|
T115 |
14 |
|
T116 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T12 |
47 |
|
T115 |
14 |
|
T116 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T12 |
25 |
|
T115 |
7 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T12 |
36 |
|
T115 |
14 |
|
T116 |
12 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T12 |
47 |
|
T115 |
13 |
|
T116 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T12 |
25 |
|
T115 |
7 |
|
T116 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T12 |
36 |
|
T115 |
14 |
|
T116 |
12 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65565 |
1 |
|
|
T12 |
1866 |
|
T115 |
634 |
|
T116 |
412 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47313 |
1 |
|
|
T12 |
787 |
|
T115 |
319 |
|
T116 |
176 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55931 |
1 |
|
|
T12 |
2033 |
|
T115 |
581 |
|
T116 |
1314 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49294 |
1 |
|
|
T12 |
1836 |
|
T115 |
982 |
|
T116 |
161 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T12 |
36 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1801 |
1 |
|
|
T12 |
39 |
|
T115 |
18 |
|
T116 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T12 |
36 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1800 |
1 |
|
|
T12 |
40 |
|
T115 |
18 |
|
T116 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T12 |
36 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1752 |
1 |
|
|
T12 |
36 |
|
T115 |
18 |
|
T116 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T12 |
36 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1767 |
1 |
|
|
T12 |
40 |
|
T115 |
18 |
|
T116 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T12 |
36 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1717 |
1 |
|
|
T12 |
35 |
|
T115 |
17 |
|
T116 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T12 |
36 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1731 |
1 |
|
|
T12 |
39 |
|
T115 |
18 |
|
T116 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T12 |
36 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1681 |
1 |
|
|
T12 |
34 |
|
T115 |
16 |
|
T116 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T12 |
36 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1697 |
1 |
|
|
T12 |
38 |
|
T115 |
18 |
|
T116 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T12 |
36 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T12 |
33 |
|
T115 |
16 |
|
T116 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T12 |
35 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T12 |
37 |
|
T115 |
18 |
|
T116 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T12 |
36 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T12 |
31 |
|
T115 |
15 |
|
T116 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T12 |
35 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1618 |
1 |
|
|
T12 |
37 |
|
T115 |
18 |
|
T116 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T12 |
36 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T12 |
30 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T12 |
35 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T12 |
35 |
|
T115 |
18 |
|
T116 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T12 |
36 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T12 |
30 |
|
T115 |
13 |
|
T116 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T12 |
35 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T12 |
35 |
|
T115 |
18 |
|
T116 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T12 |
36 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T12 |
30 |
|
T115 |
13 |
|
T116 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T12 |
35 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T12 |
33 |
|
T115 |
18 |
|
T116 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T12 |
36 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T12 |
29 |
|
T115 |
13 |
|
T116 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T12 |
35 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T12 |
33 |
|
T115 |
17 |
|
T116 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T12 |
36 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T12 |
29 |
|
T115 |
13 |
|
T116 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T12 |
35 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T12 |
33 |
|
T115 |
17 |
|
T116 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T12 |
36 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T12 |
29 |
|
T115 |
13 |
|
T116 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T12 |
35 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T12 |
32 |
|
T115 |
15 |
|
T116 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T12 |
36 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T12 |
29 |
|
T115 |
13 |
|
T116 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T12 |
35 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T12 |
32 |
|
T115 |
15 |
|
T116 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T12 |
36 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T12 |
27 |
|
T115 |
13 |
|
T116 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T12 |
35 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T12 |
32 |
|
T115 |
15 |
|
T116 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T12 |
36 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T12 |
25 |
|
T115 |
11 |
|
T116 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T12 |
35 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T12 |
32 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58804 |
1 |
|
|
T12 |
1730 |
|
T115 |
510 |
|
T116 |
1245 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49454 |
1 |
|
|
T12 |
1292 |
|
T115 |
354 |
|
T116 |
199 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54461 |
1 |
|
|
T12 |
1911 |
|
T115 |
608 |
|
T116 |
419 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
55504 |
1 |
|
|
T12 |
1584 |
|
T115 |
1013 |
|
T116 |
255 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T12 |
28 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1818 |
1 |
|
|
T12 |
47 |
|
T115 |
26 |
|
T116 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T12 |
31 |
|
T115 |
9 |
|
T116 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1795 |
1 |
|
|
T12 |
45 |
|
T115 |
23 |
|
T116 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T12 |
28 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1781 |
1 |
|
|
T12 |
47 |
|
T115 |
25 |
|
T116 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T12 |
31 |
|
T115 |
9 |
|
T116 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1758 |
1 |
|
|
T12 |
45 |
|
T115 |
23 |
|
T116 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T12 |
28 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1748 |
1 |
|
|
T12 |
47 |
|
T115 |
25 |
|
T116 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T12 |
31 |
|
T115 |
9 |
|
T116 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1707 |
1 |
|
|
T12 |
42 |
|
T115 |
22 |
|
T116 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T12 |
28 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1710 |
1 |
|
|
T12 |
46 |
|
T115 |
25 |
|
T116 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T12 |
31 |
|
T115 |
9 |
|
T116 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T12 |
40 |
|
T115 |
21 |
|
T116 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T12 |
28 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1684 |
1 |
|
|
T12 |
45 |
|
T115 |
25 |
|
T116 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T12 |
30 |
|
T115 |
9 |
|
T116 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T12 |
39 |
|
T115 |
21 |
|
T116 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T12 |
28 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T12 |
45 |
|
T115 |
24 |
|
T116 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T12 |
30 |
|
T115 |
9 |
|
T116 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T12 |
37 |
|
T115 |
19 |
|
T116 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T12 |
28 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T12 |
45 |
|
T115 |
23 |
|
T116 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T12 |
30 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T12 |
35 |
|
T115 |
20 |
|
T116 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T12 |
28 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T12 |
45 |
|
T115 |
23 |
|
T116 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T12 |
30 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T12 |
35 |
|
T115 |
19 |
|
T116 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T12 |
28 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T12 |
45 |
|
T115 |
22 |
|
T116 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T12 |
30 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T12 |
33 |
|
T115 |
18 |
|
T116 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T12 |
28 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T12 |
45 |
|
T115 |
22 |
|
T116 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T12 |
30 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T12 |
31 |
|
T115 |
17 |
|
T116 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T12 |
28 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T12 |
43 |
|
T115 |
21 |
|
T116 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T12 |
30 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T12 |
31 |
|
T115 |
16 |
|
T116 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T12 |
28 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T12 |
42 |
|
T115 |
21 |
|
T116 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T12 |
30 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T12 |
30 |
|
T115 |
16 |
|
T116 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T12 |
28 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T12 |
42 |
|
T115 |
18 |
|
T116 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T12 |
30 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T12 |
29 |
|
T115 |
16 |
|
T116 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T12 |
28 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T12 |
41 |
|
T115 |
18 |
|
T116 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T12 |
30 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T12 |
29 |
|
T115 |
15 |
|
T116 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T12 |
28 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T12 |
40 |
|
T115 |
18 |
|
T116 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T12 |
30 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T12 |
28 |
|
T115 |
14 |
|
T116 |
8 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62188 |
1 |
|
|
T12 |
2139 |
|
T115 |
396 |
|
T116 |
423 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49258 |
1 |
|
|
T12 |
1662 |
|
T115 |
504 |
|
T116 |
144 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57734 |
1 |
|
|
T12 |
1887 |
|
T115 |
548 |
|
T116 |
427 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49865 |
1 |
|
|
T12 |
964 |
|
T115 |
961 |
|
T116 |
1012 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T12 |
32 |
|
T115 |
5 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1743 |
1 |
|
|
T12 |
35 |
|
T115 |
28 |
|
T116 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T12 |
33 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1754 |
1 |
|
|
T12 |
34 |
|
T115 |
28 |
|
T116 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T12 |
32 |
|
T115 |
5 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T12 |
35 |
|
T115 |
27 |
|
T116 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T12 |
33 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1726 |
1 |
|
|
T12 |
34 |
|
T115 |
27 |
|
T116 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T12 |
32 |
|
T115 |
5 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T12 |
33 |
|
T115 |
27 |
|
T116 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T12 |
33 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1696 |
1 |
|
|
T12 |
34 |
|
T115 |
27 |
|
T116 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T12 |
32 |
|
T115 |
5 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T12 |
32 |
|
T115 |
25 |
|
T116 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T12 |
33 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T12 |
34 |
|
T115 |
27 |
|
T116 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T12 |
32 |
|
T115 |
5 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T12 |
32 |
|
T115 |
25 |
|
T116 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T12 |
32 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T12 |
34 |
|
T115 |
27 |
|
T116 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T12 |
32 |
|
T115 |
5 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T12 |
32 |
|
T115 |
25 |
|
T116 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T12 |
32 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T12 |
34 |
|
T115 |
27 |
|
T116 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T12 |
32 |
|
T115 |
5 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T12 |
32 |
|
T115 |
25 |
|
T116 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T12 |
32 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T12 |
34 |
|
T115 |
27 |
|
T116 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T12 |
32 |
|
T115 |
5 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T12 |
31 |
|
T115 |
25 |
|
T116 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T12 |
32 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T12 |
33 |
|
T115 |
26 |
|
T116 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
32 |
|
T115 |
5 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T12 |
31 |
|
T115 |
24 |
|
T116 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T12 |
32 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T12 |
33 |
|
T115 |
24 |
|
T116 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
32 |
|
T115 |
5 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T12 |
31 |
|
T115 |
24 |
|
T116 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T12 |
32 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T12 |
32 |
|
T115 |
23 |
|
T116 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
32 |
|
T115 |
5 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T12 |
31 |
|
T115 |
23 |
|
T116 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T12 |
32 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T12 |
32 |
|
T115 |
23 |
|
T116 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
32 |
|
T115 |
5 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T12 |
31 |
|
T115 |
23 |
|
T116 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T12 |
32 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T12 |
32 |
|
T115 |
22 |
|
T116 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
32 |
|
T115 |
5 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T12 |
31 |
|
T115 |
21 |
|
T116 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T12 |
32 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T12 |
31 |
|
T115 |
21 |
|
T116 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
32 |
|
T115 |
5 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T12 |
30 |
|
T115 |
20 |
|
T116 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T12 |
32 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T12 |
31 |
|
T115 |
19 |
|
T116 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
32 |
|
T115 |
5 |
|
T116 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T12 |
29 |
|
T115 |
20 |
|
T116 |
3 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T12 |
32 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T12 |
31 |
|
T115 |
18 |
|
T116 |
13 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61597 |
1 |
|
|
T12 |
1544 |
|
T115 |
399 |
|
T116 |
474 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52435 |
1 |
|
|
T12 |
1440 |
|
T115 |
528 |
|
T116 |
176 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57683 |
1 |
|
|
T12 |
1534 |
|
T115 |
284 |
|
T116 |
326 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47917 |
1 |
|
|
T12 |
2074 |
|
T115 |
1254 |
|
T116 |
935 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T12 |
19 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1751 |
1 |
|
|
T12 |
53 |
|
T115 |
24 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T12 |
21 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1770 |
1 |
|
|
T12 |
52 |
|
T115 |
25 |
|
T116 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T12 |
19 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1724 |
1 |
|
|
T12 |
53 |
|
T115 |
24 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T12 |
21 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1728 |
1 |
|
|
T12 |
51 |
|
T115 |
23 |
|
T116 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T12 |
19 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1692 |
1 |
|
|
T12 |
50 |
|
T115 |
24 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T12 |
21 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1697 |
1 |
|
|
T12 |
50 |
|
T115 |
23 |
|
T116 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T12 |
19 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T12 |
49 |
|
T115 |
23 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T12 |
21 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T12 |
50 |
|
T115 |
23 |
|
T116 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T12 |
19 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T12 |
48 |
|
T115 |
23 |
|
T116 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T12 |
21 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T12 |
49 |
|
T115 |
22 |
|
T116 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T12 |
19 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T12 |
47 |
|
T115 |
22 |
|
T116 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T12 |
21 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T12 |
49 |
|
T115 |
19 |
|
T116 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T12 |
19 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T12 |
47 |
|
T115 |
22 |
|
T116 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T12 |
47 |
|
T115 |
20 |
|
T116 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T12 |
19 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T12 |
47 |
|
T115 |
22 |
|
T116 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T12 |
47 |
|
T115 |
19 |
|
T116 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T12 |
19 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T12 |
47 |
|
T115 |
22 |
|
T116 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T12 |
46 |
|
T115 |
19 |
|
T116 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T12 |
19 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T12 |
46 |
|
T115 |
22 |
|
T116 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T12 |
44 |
|
T115 |
19 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T12 |
19 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T12 |
46 |
|
T115 |
22 |
|
T116 |
10 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T12 |
43 |
|
T115 |
19 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T12 |
19 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T12 |
45 |
|
T115 |
21 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T12 |
43 |
|
T115 |
19 |
|
T116 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T12 |
19 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T12 |
43 |
|
T115 |
21 |
|
T116 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T12 |
41 |
|
T115 |
18 |
|
T116 |
12 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T12 |
19 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T12 |
42 |
|
T115 |
21 |
|
T116 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T12 |
41 |
|
T115 |
18 |
|
T116 |
11 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T12 |
19 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T12 |
39 |
|
T115 |
19 |
|
T116 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T12 |
38 |
|
T115 |
18 |
|
T116 |
11 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
66626 |
1 |
|
|
T12 |
2640 |
|
T115 |
476 |
|
T116 |
464 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
38634 |
1 |
|
|
T12 |
1451 |
|
T115 |
337 |
|
T116 |
228 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
70770 |
1 |
|
|
T12 |
1309 |
|
T115 |
1502 |
|
T116 |
1383 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44597 |
1 |
|
|
T12 |
1103 |
|
T115 |
346 |
|
T116 |
74 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T12 |
23 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1663 |
1 |
|
|
T12 |
55 |
|
T115 |
15 |
|
T116 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T12 |
22 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1671 |
1 |
|
|
T12 |
56 |
|
T115 |
12 |
|
T116 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T12 |
23 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T12 |
54 |
|
T115 |
15 |
|
T116 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T12 |
22 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T12 |
53 |
|
T115 |
11 |
|
T116 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T12 |
23 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T12 |
53 |
|
T115 |
14 |
|
T116 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T12 |
22 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T12 |
52 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T12 |
23 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T12 |
52 |
|
T115 |
14 |
|
T116 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T12 |
22 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T12 |
51 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T12 |
23 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T12 |
51 |
|
T115 |
14 |
|
T116 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T12 |
21 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T12 |
51 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T12 |
23 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T12 |
51 |
|
T115 |
14 |
|
T116 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T12 |
21 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T12 |
49 |
|
T115 |
11 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T12 |
23 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T12 |
50 |
|
T115 |
14 |
|
T116 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T12 |
47 |
|
T115 |
12 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T12 |
23 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T12 |
49 |
|
T115 |
14 |
|
T116 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T12 |
46 |
|
T115 |
12 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T12 |
23 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T12 |
48 |
|
T115 |
14 |
|
T116 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T12 |
44 |
|
T115 |
12 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T12 |
23 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T12 |
47 |
|
T115 |
14 |
|
T116 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T12 |
42 |
|
T115 |
12 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T12 |
23 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T12 |
46 |
|
T115 |
14 |
|
T116 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T12 |
41 |
|
T115 |
12 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T12 |
23 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T12 |
45 |
|
T115 |
13 |
|
T116 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T12 |
40 |
|
T115 |
12 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T12 |
23 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T12 |
45 |
|
T115 |
13 |
|
T116 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T12 |
39 |
|
T115 |
11 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T12 |
23 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T12 |
43 |
|
T115 |
13 |
|
T116 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T12 |
38 |
|
T115 |
11 |
|
T116 |
3 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T12 |
23 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T12 |
43 |
|
T115 |
13 |
|
T116 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T12 |
37 |
|
T115 |
11 |
|
T116 |
3 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63576 |
1 |
|
|
T12 |
1238 |
|
T115 |
328 |
|
T116 |
511 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48524 |
1 |
|
|
T12 |
1256 |
|
T115 |
396 |
|
T116 |
1120 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56345 |
1 |
|
|
T12 |
2236 |
|
T115 |
1216 |
|
T116 |
223 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49687 |
1 |
|
|
T12 |
1474 |
|
T115 |
569 |
|
T116 |
219 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T12 |
21 |
|
T115 |
5 |
|
T116 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1791 |
1 |
|
|
T12 |
66 |
|
T115 |
24 |
|
T116 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T12 |
24 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1779 |
1 |
|
|
T12 |
64 |
|
T115 |
24 |
|
T116 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T12 |
21 |
|
T115 |
5 |
|
T116 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1763 |
1 |
|
|
T12 |
66 |
|
T115 |
23 |
|
T116 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T12 |
24 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1741 |
1 |
|
|
T12 |
62 |
|
T115 |
24 |
|
T116 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T12 |
21 |
|
T115 |
5 |
|
T116 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1728 |
1 |
|
|
T12 |
65 |
|
T115 |
23 |
|
T116 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T12 |
24 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1717 |
1 |
|
|
T12 |
61 |
|
T115 |
24 |
|
T116 |
10 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T12 |
21 |
|
T115 |
5 |
|
T116 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1687 |
1 |
|
|
T12 |
63 |
|
T115 |
22 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T12 |
24 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1696 |
1 |
|
|
T12 |
60 |
|
T115 |
24 |
|
T116 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T12 |
21 |
|
T115 |
5 |
|
T116 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T12 |
61 |
|
T115 |
22 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T12 |
23 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T12 |
60 |
|
T115 |
24 |
|
T116 |
9 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T12 |
21 |
|
T115 |
5 |
|
T116 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T12 |
59 |
|
T115 |
22 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T12 |
23 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T12 |
60 |
|
T115 |
24 |
|
T116 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T12 |
21 |
|
T115 |
5 |
|
T116 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T12 |
58 |
|
T115 |
21 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T12 |
23 |
|
T115 |
5 |
|
T116 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T12 |
59 |
|
T115 |
24 |
|
T116 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T12 |
21 |
|
T115 |
5 |
|
T116 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T12 |
58 |
|
T115 |
20 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T12 |
23 |
|
T115 |
5 |
|
T116 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T12 |
59 |
|
T115 |
24 |
|
T116 |
7 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T12 |
21 |
|
T115 |
5 |
|
T116 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T12 |
56 |
|
T115 |
20 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T12 |
23 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T12 |
59 |
|
T115 |
23 |
|
T116 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T12 |
21 |
|
T115 |
5 |
|
T116 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T12 |
54 |
|
T115 |
18 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T12 |
23 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T12 |
58 |
|
T115 |
22 |
|
T116 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T12 |
21 |
|
T115 |
5 |
|
T116 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T12 |
51 |
|
T115 |
17 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T12 |
23 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T12 |
57 |
|
T115 |
21 |
|
T116 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T12 |
21 |
|
T115 |
5 |
|
T116 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T12 |
49 |
|
T115 |
17 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T12 |
23 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T12 |
55 |
|
T115 |
21 |
|
T116 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T12 |
21 |
|
T115 |
5 |
|
T116 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T12 |
46 |
|
T115 |
17 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T12 |
23 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T12 |
55 |
|
T115 |
21 |
|
T116 |
8 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T12 |
21 |
|
T115 |
5 |
|
T116 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T12 |
45 |
|
T115 |
15 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T12 |
23 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T12 |
53 |
|
T115 |
21 |
|
T116 |
6 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T12 |
21 |
|
T115 |
5 |
|
T116 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T12 |
45 |
|
T115 |
14 |
|
T116 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T12 |
23 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T12 |
53 |
|
T115 |
21 |
|
T116 |
6 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65862 |
1 |
|
|
T12 |
2137 |
|
T115 |
644 |
|
T116 |
308 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48319 |
1 |
|
|
T12 |
1545 |
|
T115 |
432 |
|
T116 |
232 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57071 |
1 |
|
|
T12 |
1440 |
|
T115 |
425 |
|
T116 |
402 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48054 |
1 |
|
|
T12 |
1134 |
|
T115 |
1024 |
|
T116 |
1092 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1765 |
1 |
|
|
T12 |
62 |
|
T115 |
19 |
|
T116 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1807 |
1 |
|
|
T12 |
58 |
|
T115 |
20 |
|
T116 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
765 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1725 |
1 |
|
|
T12 |
60 |
|
T115 |
19 |
|
T116 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1776 |
1 |
|
|
T12 |
58 |
|
T115 |
19 |
|
T116 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1701 |
1 |
|
|
T12 |
60 |
|
T115 |
19 |
|
T116 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1734 |
1 |
|
|
T12 |
58 |
|
T115 |
19 |
|
T116 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T12 |
59 |
|
T115 |
18 |
|
T116 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T12 |
56 |
|
T115 |
19 |
|
T116 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T12 |
56 |
|
T115 |
18 |
|
T116 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T12 |
55 |
|
T115 |
19 |
|
T116 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T12 |
54 |
|
T115 |
16 |
|
T116 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T12 |
55 |
|
T115 |
17 |
|
T116 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T12 |
51 |
|
T115 |
16 |
|
T116 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T12 |
54 |
|
T115 |
17 |
|
T116 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T12 |
51 |
|
T115 |
16 |
|
T116 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T12 |
53 |
|
T115 |
16 |
|
T116 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T12 |
51 |
|
T115 |
16 |
|
T116 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T12 |
50 |
|
T115 |
15 |
|
T116 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T12 |
51 |
|
T115 |
16 |
|
T116 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T12 |
49 |
|
T115 |
14 |
|
T116 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T12 |
51 |
|
T115 |
15 |
|
T116 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T12 |
49 |
|
T115 |
13 |
|
T116 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T12 |
49 |
|
T115 |
15 |
|
T116 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T12 |
49 |
|
T115 |
12 |
|
T116 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T12 |
49 |
|
T115 |
15 |
|
T116 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T12 |
47 |
|
T115 |
12 |
|
T116 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T12 |
48 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T12 |
46 |
|
T115 |
12 |
|
T116 |
15 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T12 |
47 |
|
T115 |
14 |
|
T116 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
4 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T12 |
43 |
|
T115 |
12 |
|
T116 |
14 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
66237 |
1 |
|
|
T12 |
1500 |
|
T115 |
982 |
|
T116 |
635 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49202 |
1 |
|
|
T12 |
2117 |
|
T115 |
492 |
|
T116 |
234 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57779 |
1 |
|
|
T12 |
1436 |
|
T115 |
398 |
|
T116 |
389 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45587 |
1 |
|
|
T12 |
1116 |
|
T115 |
535 |
|
T116 |
848 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T12 |
26 |
|
T115 |
4 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1799 |
1 |
|
|
T12 |
64 |
|
T115 |
30 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T12 |
28 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1775 |
1 |
|
|
T12 |
62 |
|
T115 |
26 |
|
T116 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T12 |
26 |
|
T115 |
4 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1766 |
1 |
|
|
T12 |
62 |
|
T115 |
30 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T12 |
28 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1745 |
1 |
|
|
T12 |
60 |
|
T115 |
26 |
|
T116 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T12 |
26 |
|
T115 |
4 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1731 |
1 |
|
|
T12 |
60 |
|
T115 |
29 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T12 |
28 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T12 |
59 |
|
T115 |
26 |
|
T116 |
10 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T12 |
26 |
|
T115 |
4 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1691 |
1 |
|
|
T12 |
59 |
|
T115 |
29 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T12 |
28 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1679 |
1 |
|
|
T12 |
57 |
|
T115 |
24 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T12 |
26 |
|
T115 |
4 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1653 |
1 |
|
|
T12 |
59 |
|
T115 |
27 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T12 |
27 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T12 |
57 |
|
T115 |
23 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T12 |
26 |
|
T115 |
4 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1616 |
1 |
|
|
T12 |
59 |
|
T115 |
27 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T12 |
27 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1618 |
1 |
|
|
T12 |
54 |
|
T115 |
23 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T12 |
26 |
|
T115 |
4 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T12 |
58 |
|
T115 |
26 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T12 |
27 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T12 |
53 |
|
T115 |
23 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T12 |
26 |
|
T115 |
4 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T12 |
56 |
|
T115 |
26 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T12 |
27 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T12 |
53 |
|
T115 |
23 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T12 |
26 |
|
T115 |
4 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T12 |
54 |
|
T115 |
26 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T12 |
27 |
|
T115 |
8 |
|
T116 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T12 |
50 |
|
T115 |
23 |
|
T116 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T12 |
26 |
|
T115 |
4 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T12 |
53 |
|
T115 |
26 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T12 |
27 |
|
T115 |
8 |
|
T116 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T12 |
50 |
|
T115 |
23 |
|
T116 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T12 |
26 |
|
T115 |
4 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T12 |
52 |
|
T115 |
23 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T12 |
27 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T12 |
50 |
|
T115 |
21 |
|
T116 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T12 |
26 |
|
T115 |
4 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T12 |
51 |
|
T115 |
23 |
|
T116 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T12 |
27 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T12 |
50 |
|
T115 |
19 |
|
T116 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T12 |
26 |
|
T115 |
4 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T12 |
47 |
|
T115 |
23 |
|
T116 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T12 |
27 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T12 |
48 |
|
T115 |
18 |
|
T116 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T12 |
26 |
|
T115 |
4 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T12 |
45 |
|
T115 |
21 |
|
T116 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T12 |
27 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T12 |
45 |
|
T115 |
18 |
|
T116 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T12 |
26 |
|
T115 |
4 |
|
T116 |
6 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T12 |
45 |
|
T115 |
20 |
|
T116 |
8 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T12 |
27 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T12 |
45 |
|
T115 |
18 |
|
T116 |
6 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56636 |
1 |
|
|
T12 |
1827 |
|
T115 |
409 |
|
T116 |
1218 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45921 |
1 |
|
|
T12 |
1031 |
|
T115 |
522 |
|
T116 |
186 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63648 |
1 |
|
|
T12 |
1452 |
|
T115 |
893 |
|
T116 |
427 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52188 |
1 |
|
|
T12 |
2072 |
|
T115 |
598 |
|
T116 |
266 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
30 |
|
T115 |
4 |
|
T116 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1785 |
1 |
|
|
T12 |
49 |
|
T115 |
29 |
|
T116 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T12 |
28 |
|
T115 |
5 |
|
T116 |
6 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1763 |
1 |
|
|
T12 |
52 |
|
T115 |
29 |
|
T116 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
30 |
|
T115 |
4 |
|
T116 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1753 |
1 |
|
|
T12 |
49 |
|
T115 |
28 |
|
T116 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
796 |
1 |
|
|
T12 |
28 |
|
T115 |
5 |
|
T116 |
6 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1723 |
1 |
|
|
T12 |
51 |
|
T115 |
29 |
|
T116 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
30 |
|
T115 |
4 |
|
T116 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1718 |
1 |
|
|
T12 |
47 |
|
T115 |
27 |
|
T116 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T12 |
28 |
|
T115 |
5 |
|
T116 |
6 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1690 |
1 |
|
|
T12 |
51 |
|
T115 |
29 |
|
T116 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
30 |
|
T115 |
4 |
|
T116 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1682 |
1 |
|
|
T12 |
47 |
|
T115 |
26 |
|
T116 |
9 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T12 |
28 |
|
T115 |
5 |
|
T116 |
6 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1648 |
1 |
|
|
T12 |
51 |
|
T115 |
28 |
|
T116 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T12 |
30 |
|
T115 |
4 |
|
T116 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T12 |
46 |
|
T115 |
26 |
|
T116 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T12 |
27 |
|
T115 |
5 |
|
T116 |
6 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T12 |
50 |
|
T115 |
28 |
|
T116 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T12 |
30 |
|
T115 |
4 |
|
T116 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T12 |
44 |
|
T115 |
25 |
|
T116 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T12 |
27 |
|
T115 |
5 |
|
T116 |
6 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T12 |
49 |
|
T115 |
27 |
|
T116 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T12 |
30 |
|
T115 |
4 |
|
T116 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T12 |
43 |
|
T115 |
25 |
|
T116 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T12 |
27 |
|
T115 |
5 |
|
T116 |
6 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T12 |
48 |
|
T115 |
27 |
|
T116 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T12 |
30 |
|
T115 |
4 |
|
T116 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T12 |
42 |
|
T115 |
25 |
|
T116 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T12 |
27 |
|
T115 |
5 |
|
T116 |
6 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T12 |
48 |
|
T115 |
26 |
|
T116 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T12 |
30 |
|
T115 |
4 |
|
T116 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T12 |
42 |
|
T115 |
25 |
|
T116 |
6 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T12 |
27 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T12 |
48 |
|
T115 |
26 |
|
T116 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T12 |
30 |
|
T115 |
4 |
|
T116 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T12 |
41 |
|
T115 |
23 |
|
T116 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T12 |
27 |
|
T115 |
5 |
|
T116 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T12 |
45 |
|
T115 |
25 |
|
T116 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T12 |
30 |
|
T115 |
4 |
|
T116 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T12 |
39 |
|
T115 |
23 |
|
T116 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T12 |
27 |
|
T115 |
4 |
|
T116 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T12 |
45 |
|
T115 |
24 |
|
T116 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T12 |
30 |
|
T115 |
4 |
|
T116 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T12 |
36 |
|
T115 |
23 |
|
T116 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T12 |
27 |
|
T115 |
4 |
|
T116 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T12 |
45 |
|
T115 |
23 |
|
T116 |
11 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T12 |
30 |
|
T115 |
4 |
|
T116 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T12 |
36 |
|
T115 |
23 |
|
T116 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T12 |
27 |
|
T115 |
4 |
|
T116 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T12 |
45 |
|
T115 |
20 |
|
T116 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T12 |
30 |
|
T115 |
4 |
|
T116 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T12 |
36 |
|
T115 |
22 |
|
T116 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T12 |
27 |
|
T115 |
4 |
|
T116 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T12 |
43 |
|
T115 |
19 |
|
T116 |
10 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T12 |
30 |
|
T115 |
4 |
|
T116 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T12 |
34 |
|
T115 |
21 |
|
T116 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T12 |
27 |
|
T115 |
4 |
|
T116 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T12 |
42 |
|
T115 |
19 |
|
T116 |
10 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63623 |
1 |
|
|
T12 |
1359 |
|
T115 |
1013 |
|
T116 |
928 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42772 |
1 |
|
|
T12 |
1342 |
|
T115 |
611 |
|
T116 |
396 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58169 |
1 |
|
|
T12 |
2194 |
|
T115 |
358 |
|
T116 |
227 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
54188 |
1 |
|
|
T12 |
1457 |
|
T115 |
487 |
|
T116 |
297 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T12 |
24 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1764 |
1 |
|
|
T12 |
60 |
|
T115 |
22 |
|
T116 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T12 |
24 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1802 |
1 |
|
|
T12 |
61 |
|
T115 |
19 |
|
T116 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T12 |
24 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T12 |
58 |
|
T115 |
20 |
|
T116 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T12 |
24 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1778 |
1 |
|
|
T12 |
60 |
|
T115 |
19 |
|
T116 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T12 |
24 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1688 |
1 |
|
|
T12 |
57 |
|
T115 |
20 |
|
T116 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T12 |
24 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1740 |
1 |
|
|
T12 |
60 |
|
T115 |
19 |
|
T116 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T12 |
24 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1644 |
1 |
|
|
T12 |
54 |
|
T115 |
20 |
|
T116 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T12 |
24 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1703 |
1 |
|
|
T12 |
59 |
|
T115 |
18 |
|
T116 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T12 |
24 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T12 |
51 |
|
T115 |
19 |
|
T116 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T12 |
23 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T12 |
59 |
|
T115 |
18 |
|
T116 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T12 |
24 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T12 |
50 |
|
T115 |
19 |
|
T116 |
18 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T12 |
23 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T12 |
59 |
|
T115 |
18 |
|
T116 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T12 |
24 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T12 |
45 |
|
T115 |
19 |
|
T116 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T12 |
56 |
|
T115 |
19 |
|
T116 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
781 |
1 |
|
|
T12 |
24 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T12 |
44 |
|
T115 |
19 |
|
T116 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T12 |
56 |
|
T115 |
19 |
|
T116 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T12 |
24 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T12 |
43 |
|
T115 |
19 |
|
T116 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T12 |
54 |
|
T115 |
19 |
|
T116 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T12 |
24 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T12 |
41 |
|
T115 |
18 |
|
T116 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T12 |
51 |
|
T115 |
19 |
|
T116 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T12 |
24 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T12 |
41 |
|
T115 |
18 |
|
T116 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T12 |
50 |
|
T115 |
18 |
|
T116 |
14 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T12 |
24 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T12 |
41 |
|
T115 |
18 |
|
T116 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T12 |
50 |
|
T115 |
18 |
|
T116 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T12 |
24 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T12 |
39 |
|
T115 |
18 |
|
T116 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T12 |
50 |
|
T115 |
18 |
|
T116 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T12 |
24 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T12 |
39 |
|
T115 |
16 |
|
T116 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T12 |
49 |
|
T115 |
18 |
|
T116 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T12 |
24 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T12 |
39 |
|
T115 |
15 |
|
T116 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T12 |
23 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T12 |
48 |
|
T115 |
18 |
|
T116 |
12 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59870 |
1 |
|
|
T12 |
1632 |
|
T115 |
1024 |
|
T116 |
471 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44965 |
1 |
|
|
T12 |
1015 |
|
T115 |
455 |
|
T116 |
976 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56182 |
1 |
|
|
T12 |
2781 |
|
T115 |
375 |
|
T116 |
228 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
57111 |
1 |
|
|
T12 |
909 |
|
T115 |
578 |
|
T116 |
409 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1799 |
1 |
|
|
T12 |
56 |
|
T115 |
29 |
|
T116 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T12 |
30 |
|
T115 |
4 |
|
T116 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1831 |
1 |
|
|
T12 |
55 |
|
T115 |
31 |
|
T116 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1767 |
1 |
|
|
T12 |
54 |
|
T115 |
27 |
|
T116 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T12 |
30 |
|
T115 |
4 |
|
T116 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1793 |
1 |
|
|
T12 |
54 |
|
T115 |
31 |
|
T116 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1725 |
1 |
|
|
T12 |
54 |
|
T115 |
27 |
|
T116 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T12 |
30 |
|
T115 |
4 |
|
T116 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1759 |
1 |
|
|
T12 |
53 |
|
T115 |
30 |
|
T116 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
763 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1685 |
1 |
|
|
T12 |
52 |
|
T115 |
25 |
|
T116 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T12 |
30 |
|
T115 |
4 |
|
T116 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1720 |
1 |
|
|
T12 |
51 |
|
T115 |
30 |
|
T116 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T12 |
51 |
|
T115 |
24 |
|
T116 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T12 |
29 |
|
T115 |
4 |
|
T116 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T12 |
49 |
|
T115 |
29 |
|
T116 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T12 |
51 |
|
T115 |
24 |
|
T116 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T12 |
29 |
|
T115 |
4 |
|
T116 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T12 |
48 |
|
T115 |
28 |
|
T116 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T12 |
51 |
|
T115 |
22 |
|
T116 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T12 |
29 |
|
T115 |
3 |
|
T116 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T12 |
46 |
|
T115 |
29 |
|
T116 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T12 |
48 |
|
T115 |
21 |
|
T116 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T12 |
29 |
|
T115 |
3 |
|
T116 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T12 |
45 |
|
T115 |
28 |
|
T116 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T12 |
46 |
|
T115 |
19 |
|
T116 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T12 |
29 |
|
T115 |
3 |
|
T116 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T12 |
43 |
|
T115 |
27 |
|
T116 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T12 |
44 |
|
T115 |
19 |
|
T116 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T12 |
29 |
|
T115 |
3 |
|
T116 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T12 |
43 |
|
T115 |
26 |
|
T116 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T12 |
43 |
|
T115 |
18 |
|
T116 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T12 |
29 |
|
T115 |
3 |
|
T116 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T12 |
43 |
|
T115 |
25 |
|
T116 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T12 |
41 |
|
T115 |
15 |
|
T116 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T12 |
29 |
|
T115 |
3 |
|
T116 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T12 |
40 |
|
T115 |
25 |
|
T116 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T12 |
40 |
|
T115 |
15 |
|
T116 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T12 |
29 |
|
T115 |
3 |
|
T116 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T12 |
40 |
|
T115 |
25 |
|
T116 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T12 |
38 |
|
T115 |
15 |
|
T116 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T12 |
29 |
|
T115 |
3 |
|
T116 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T12 |
38 |
|
T115 |
25 |
|
T116 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T12 |
37 |
|
T115 |
15 |
|
T116 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T12 |
29 |
|
T115 |
3 |
|
T116 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T12 |
35 |
|
T115 |
25 |
|
T116 |
9 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59348 |
1 |
|
|
T12 |
1196 |
|
T115 |
262 |
|
T116 |
268 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49878 |
1 |
|
|
T12 |
1218 |
|
T115 |
523 |
|
T116 |
301 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60686 |
1 |
|
|
T12 |
1359 |
|
T115 |
995 |
|
T116 |
193 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48779 |
1 |
|
|
T12 |
2347 |
|
T115 |
509 |
|
T116 |
1159 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1758 |
1 |
|
|
T12 |
71 |
|
T115 |
32 |
|
T116 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T12 |
27 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1774 |
1 |
|
|
T12 |
66 |
|
T115 |
32 |
|
T116 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1730 |
1 |
|
|
T12 |
69 |
|
T115 |
31 |
|
T116 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T12 |
27 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1749 |
1 |
|
|
T12 |
64 |
|
T115 |
31 |
|
T116 |
19 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1702 |
1 |
|
|
T12 |
69 |
|
T115 |
30 |
|
T116 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T12 |
27 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1713 |
1 |
|
|
T12 |
64 |
|
T115 |
31 |
|
T116 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T12 |
66 |
|
T115 |
28 |
|
T116 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T12 |
27 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T12 |
64 |
|
T115 |
31 |
|
T116 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T12 |
62 |
|
T115 |
28 |
|
T116 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T12 |
26 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T12 |
63 |
|
T115 |
30 |
|
T116 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T12 |
60 |
|
T115 |
28 |
|
T116 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T12 |
26 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T12 |
62 |
|
T115 |
29 |
|
T116 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T12 |
58 |
|
T115 |
28 |
|
T116 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T12 |
26 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T12 |
60 |
|
T115 |
29 |
|
T116 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T12 |
54 |
|
T115 |
28 |
|
T116 |
13 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T12 |
26 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T12 |
59 |
|
T115 |
29 |
|
T116 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T12 |
53 |
|
T115 |
28 |
|
T116 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T12 |
26 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T12 |
59 |
|
T115 |
28 |
|
T116 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T12 |
52 |
|
T115 |
27 |
|
T116 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T12 |
26 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T12 |
59 |
|
T115 |
27 |
|
T116 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T12 |
52 |
|
T115 |
25 |
|
T116 |
11 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T12 |
26 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T12 |
59 |
|
T115 |
27 |
|
T116 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T12 |
49 |
|
T115 |
23 |
|
T116 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T12 |
26 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T12 |
57 |
|
T115 |
26 |
|
T116 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T12 |
49 |
|
T115 |
23 |
|
T116 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T12 |
26 |
|
T115 |
6 |
|
T116 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T12 |
54 |
|
T115 |
26 |
|
T116 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T12 |
49 |
|
T115 |
22 |
|
T116 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T12 |
26 |
|
T115 |
6 |
|
T116 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T12 |
53 |
|
T115 |
25 |
|
T116 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T12 |
21 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T12 |
48 |
|
T115 |
21 |
|
T116 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T12 |
26 |
|
T115 |
6 |
|
T116 |
4 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T12 |
52 |
|
T115 |
24 |
|
T116 |
16 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
71464 |
1 |
|
|
T12 |
1525 |
|
T115 |
1210 |
|
T116 |
1177 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41792 |
1 |
|
|
T12 |
1002 |
|
T115 |
427 |
|
T116 |
151 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60432 |
1 |
|
|
T12 |
2333 |
|
T115 |
592 |
|
T116 |
585 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45057 |
1 |
|
|
T12 |
1476 |
|
T115 |
337 |
|
T116 |
191 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T12 |
25 |
|
T115 |
11 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1755 |
1 |
|
|
T12 |
58 |
|
T115 |
16 |
|
T116 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T12 |
28 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1748 |
1 |
|
|
T12 |
56 |
|
T115 |
16 |
|
T116 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T12 |
25 |
|
T115 |
11 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1722 |
1 |
|
|
T12 |
56 |
|
T115 |
15 |
|
T116 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T12 |
28 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1720 |
1 |
|
|
T12 |
55 |
|
T115 |
16 |
|
T116 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T12 |
25 |
|
T115 |
11 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1681 |
1 |
|
|
T12 |
53 |
|
T115 |
15 |
|
T116 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T12 |
28 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1688 |
1 |
|
|
T12 |
55 |
|
T115 |
15 |
|
T116 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T12 |
25 |
|
T115 |
11 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T12 |
52 |
|
T115 |
15 |
|
T116 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T12 |
28 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1656 |
1 |
|
|
T12 |
55 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T12 |
25 |
|
T115 |
11 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T12 |
49 |
|
T115 |
15 |
|
T116 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T12 |
27 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T12 |
54 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T12 |
25 |
|
T115 |
11 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T12 |
48 |
|
T115 |
15 |
|
T116 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T12 |
27 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T12 |
54 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T12 |
25 |
|
T115 |
11 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T12 |
48 |
|
T115 |
15 |
|
T116 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T12 |
27 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T12 |
53 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T12 |
25 |
|
T115 |
11 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T12 |
47 |
|
T115 |
15 |
|
T116 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T12 |
27 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T12 |
52 |
|
T115 |
13 |
|
T116 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T12 |
25 |
|
T115 |
11 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T12 |
46 |
|
T115 |
15 |
|
T116 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T12 |
27 |
|
T115 |
11 |
|
T116 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T12 |
50 |
|
T115 |
12 |
|
T116 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T12 |
25 |
|
T115 |
11 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T12 |
45 |
|
T115 |
14 |
|
T116 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T12 |
27 |
|
T115 |
11 |
|
T116 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T12 |
49 |
|
T115 |
12 |
|
T116 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T12 |
25 |
|
T115 |
11 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T12 |
44 |
|
T115 |
14 |
|
T116 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T12 |
47 |
|
T115 |
12 |
|
T116 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T12 |
25 |
|
T115 |
11 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T12 |
42 |
|
T115 |
13 |
|
T116 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T12 |
46 |
|
T115 |
12 |
|
T116 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T12 |
25 |
|
T115 |
11 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T12 |
40 |
|
T115 |
12 |
|
T116 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T12 |
46 |
|
T115 |
12 |
|
T116 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T12 |
25 |
|
T115 |
11 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T12 |
38 |
|
T115 |
12 |
|
T116 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T12 |
45 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T12 |
25 |
|
T115 |
11 |
|
T116 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T12 |
38 |
|
T115 |
12 |
|
T116 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T12 |
44 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61491 |
1 |
|
|
T12 |
1789 |
|
T115 |
1165 |
|
T116 |
1213 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48337 |
1 |
|
|
T12 |
1350 |
|
T115 |
487 |
|
T116 |
152 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59303 |
1 |
|
|
T12 |
2369 |
|
T115 |
390 |
|
T116 |
540 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49100 |
1 |
|
|
T12 |
961 |
|
T115 |
455 |
|
T116 |
141 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1802 |
1 |
|
|
T12 |
52 |
|
T115 |
20 |
|
T116 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T12 |
31 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1798 |
1 |
|
|
T12 |
47 |
|
T115 |
23 |
|
T116 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1762 |
1 |
|
|
T12 |
52 |
|
T115 |
19 |
|
T116 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T12 |
31 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1768 |
1 |
|
|
T12 |
46 |
|
T115 |
22 |
|
T116 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1731 |
1 |
|
|
T12 |
51 |
|
T115 |
19 |
|
T116 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T12 |
31 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1740 |
1 |
|
|
T12 |
45 |
|
T115 |
21 |
|
T116 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T12 |
51 |
|
T115 |
19 |
|
T116 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T12 |
31 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1697 |
1 |
|
|
T12 |
43 |
|
T115 |
21 |
|
T116 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T12 |
50 |
|
T115 |
17 |
|
T116 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T12 |
30 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1675 |
1 |
|
|
T12 |
41 |
|
T115 |
21 |
|
T116 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T12 |
50 |
|
T115 |
16 |
|
T116 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T12 |
30 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T12 |
40 |
|
T115 |
21 |
|
T116 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T12 |
49 |
|
T115 |
16 |
|
T116 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T12 |
30 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T12 |
39 |
|
T115 |
21 |
|
T116 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T12 |
47 |
|
T115 |
15 |
|
T116 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T12 |
30 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T12 |
39 |
|
T115 |
21 |
|
T116 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T12 |
47 |
|
T115 |
15 |
|
T116 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T12 |
30 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T12 |
37 |
|
T115 |
21 |
|
T116 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T12 |
47 |
|
T115 |
15 |
|
T116 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T12 |
30 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T12 |
33 |
|
T115 |
21 |
|
T116 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T12 |
45 |
|
T115 |
14 |
|
T116 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T12 |
30 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T12 |
33 |
|
T115 |
21 |
|
T116 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T12 |
45 |
|
T115 |
14 |
|
T116 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T12 |
30 |
|
T115 |
7 |
|
T116 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T12 |
33 |
|
T115 |
21 |
|
T116 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T12 |
44 |
|
T115 |
13 |
|
T116 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T12 |
30 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T12 |
33 |
|
T115 |
20 |
|
T116 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T12 |
44 |
|
T115 |
13 |
|
T116 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T12 |
30 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T12 |
31 |
|
T115 |
19 |
|
T116 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T12 |
43 |
|
T115 |
12 |
|
T116 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T12 |
30 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T12 |
30 |
|
T115 |
19 |
|
T116 |
8 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59967 |
1 |
|
|
T12 |
3184 |
|
T115 |
838 |
|
T116 |
405 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51946 |
1 |
|
|
T12 |
1246 |
|
T115 |
390 |
|
T116 |
1110 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58466 |
1 |
|
|
T12 |
1331 |
|
T115 |
1146 |
|
T116 |
306 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47979 |
1 |
|
|
T12 |
781 |
|
T115 |
256 |
|
T116 |
201 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1828 |
1 |
|
|
T12 |
52 |
|
T115 |
14 |
|
T116 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T12 |
24 |
|
T115 |
13 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1819 |
1 |
|
|
T12 |
52 |
|
T115 |
12 |
|
T116 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1789 |
1 |
|
|
T12 |
52 |
|
T115 |
14 |
|
T116 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T12 |
24 |
|
T115 |
13 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1790 |
1 |
|
|
T12 |
50 |
|
T115 |
12 |
|
T116 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1762 |
1 |
|
|
T12 |
52 |
|
T115 |
13 |
|
T116 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T12 |
24 |
|
T115 |
13 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1750 |
1 |
|
|
T12 |
49 |
|
T115 |
11 |
|
T116 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1735 |
1 |
|
|
T12 |
52 |
|
T115 |
13 |
|
T116 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T12 |
24 |
|
T115 |
13 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1712 |
1 |
|
|
T12 |
45 |
|
T115 |
11 |
|
T116 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1701 |
1 |
|
|
T12 |
50 |
|
T115 |
13 |
|
T116 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T12 |
23 |
|
T115 |
13 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T12 |
44 |
|
T115 |
11 |
|
T116 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T12 |
49 |
|
T115 |
12 |
|
T116 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T12 |
23 |
|
T115 |
13 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T12 |
43 |
|
T115 |
11 |
|
T116 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T12 |
48 |
|
T115 |
12 |
|
T116 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T12 |
23 |
|
T115 |
12 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T12 |
42 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T12 |
48 |
|
T115 |
11 |
|
T116 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T12 |
23 |
|
T115 |
12 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T12 |
40 |
|
T115 |
10 |
|
T116 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T12 |
48 |
|
T115 |
11 |
|
T116 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T12 |
23 |
|
T115 |
12 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T12 |
38 |
|
T115 |
10 |
|
T116 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T12 |
48 |
|
T115 |
11 |
|
T116 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T12 |
23 |
|
T115 |
12 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T12 |
36 |
|
T115 |
10 |
|
T116 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T12 |
46 |
|
T115 |
11 |
|
T116 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T12 |
23 |
|
T115 |
12 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T12 |
36 |
|
T115 |
10 |
|
T116 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T12 |
46 |
|
T115 |
11 |
|
T116 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T12 |
23 |
|
T115 |
12 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T12 |
33 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T12 |
46 |
|
T115 |
11 |
|
T116 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T12 |
23 |
|
T115 |
12 |
|
T116 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T12 |
33 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T12 |
46 |
|
T115 |
11 |
|
T116 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T12 |
23 |
|
T115 |
12 |
|
T116 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T12 |
33 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T12 |
24 |
|
T115 |
10 |
|
T116 |
6 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T12 |
45 |
|
T115 |
10 |
|
T116 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T12 |
23 |
|
T115 |
12 |
|
T116 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T12 |
32 |
|
T115 |
9 |
|
T116 |
8 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61523 |
1 |
|
|
T12 |
2217 |
|
T115 |
549 |
|
T116 |
964 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46013 |
1 |
|
|
T12 |
993 |
|
T115 |
897 |
|
T116 |
279 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64058 |
1 |
|
|
T12 |
1977 |
|
T115 |
608 |
|
T116 |
598 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46473 |
1 |
|
|
T12 |
1222 |
|
T115 |
401 |
|
T116 |
210 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1812 |
1 |
|
|
T12 |
54 |
|
T115 |
24 |
|
T116 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T12 |
28 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1817 |
1 |
|
|
T12 |
50 |
|
T115 |
24 |
|
T116 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1786 |
1 |
|
|
T12 |
54 |
|
T115 |
24 |
|
T116 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T12 |
28 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1785 |
1 |
|
|
T12 |
50 |
|
T115 |
23 |
|
T116 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1756 |
1 |
|
|
T12 |
52 |
|
T115 |
24 |
|
T116 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T12 |
28 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1761 |
1 |
|
|
T12 |
49 |
|
T115 |
23 |
|
T116 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1711 |
1 |
|
|
T12 |
52 |
|
T115 |
24 |
|
T116 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T12 |
28 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1718 |
1 |
|
|
T12 |
49 |
|
T115 |
23 |
|
T116 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1677 |
1 |
|
|
T12 |
50 |
|
T115 |
24 |
|
T116 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T12 |
27 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1682 |
1 |
|
|
T12 |
48 |
|
T115 |
23 |
|
T116 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T12 |
49 |
|
T115 |
23 |
|
T116 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
756 |
1 |
|
|
T12 |
27 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T12 |
47 |
|
T115 |
23 |
|
T116 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T12 |
49 |
|
T115 |
22 |
|
T116 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1624 |
1 |
|
|
T12 |
47 |
|
T115 |
24 |
|
T116 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T12 |
49 |
|
T115 |
21 |
|
T116 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T12 |
47 |
|
T115 |
24 |
|
T116 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T12 |
47 |
|
T115 |
21 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T12 |
46 |
|
T115 |
23 |
|
T116 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T12 |
46 |
|
T115 |
19 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T12 |
46 |
|
T115 |
23 |
|
T116 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T12 |
45 |
|
T115 |
18 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T12 |
45 |
|
T115 |
23 |
|
T116 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T12 |
45 |
|
T115 |
16 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T12 |
43 |
|
T115 |
23 |
|
T116 |
8 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T12 |
44 |
|
T115 |
14 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T12 |
40 |
|
T115 |
23 |
|
T116 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T12 |
43 |
|
T115 |
13 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T12 |
40 |
|
T115 |
23 |
|
T116 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
5 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T12 |
42 |
|
T115 |
11 |
|
T116 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T12 |
39 |
|
T115 |
23 |
|
T116 |
7 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65025 |
1 |
|
|
T12 |
2647 |
|
T115 |
522 |
|
T116 |
287 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41392 |
1 |
|
|
T12 |
1439 |
|
T115 |
358 |
|
T116 |
231 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60044 |
1 |
|
|
T12 |
1852 |
|
T115 |
584 |
|
T116 |
1269 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52766 |
1 |
|
|
T12 |
714 |
|
T115 |
1078 |
|
T116 |
207 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1737 |
1 |
|
|
T12 |
42 |
|
T115 |
22 |
|
T116 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T12 |
26 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1729 |
1 |
|
|
T12 |
44 |
|
T115 |
18 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1695 |
1 |
|
|
T12 |
42 |
|
T115 |
19 |
|
T116 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T12 |
26 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1682 |
1 |
|
|
T12 |
42 |
|
T115 |
18 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1666 |
1 |
|
|
T12 |
41 |
|
T115 |
19 |
|
T116 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T12 |
26 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1654 |
1 |
|
|
T12 |
40 |
|
T115 |
18 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T12 |
41 |
|
T115 |
19 |
|
T116 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T12 |
26 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T12 |
40 |
|
T115 |
18 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T12 |
41 |
|
T115 |
19 |
|
T116 |
13 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T12 |
25 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T12 |
40 |
|
T115 |
18 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T12 |
40 |
|
T115 |
18 |
|
T116 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T12 |
25 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T12 |
39 |
|
T115 |
18 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T12 |
40 |
|
T115 |
18 |
|
T116 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T12 |
38 |
|
T115 |
19 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T12 |
39 |
|
T115 |
17 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T12 |
37 |
|
T115 |
18 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T12 |
39 |
|
T115 |
16 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T12 |
36 |
|
T115 |
18 |
|
T116 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T12 |
39 |
|
T115 |
15 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T12 |
36 |
|
T115 |
17 |
|
T116 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T12 |
39 |
|
T115 |
15 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T12 |
36 |
|
T115 |
16 |
|
T116 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T12 |
39 |
|
T115 |
15 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T12 |
30 |
|
T115 |
16 |
|
T116 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T12 |
39 |
|
T115 |
15 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T12 |
29 |
|
T115 |
16 |
|
T116 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T12 |
39 |
|
T115 |
14 |
|
T116 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T12 |
24 |
|
T115 |
16 |
|
T116 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T12 |
28 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T12 |
39 |
|
T115 |
13 |
|
T116 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
774 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T12 |
24 |
|
T115 |
16 |
|
T116 |
8 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65531 |
1 |
|
|
T12 |
1512 |
|
T115 |
1398 |
|
T116 |
455 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41828 |
1 |
|
|
T12 |
1349 |
|
T115 |
379 |
|
T116 |
178 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62469 |
1 |
|
|
T12 |
2685 |
|
T115 |
366 |
|
T116 |
1161 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48812 |
1 |
|
|
T12 |
870 |
|
T115 |
427 |
|
T116 |
257 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1737 |
1 |
|
|
T12 |
56 |
|
T115 |
21 |
|
T116 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1763 |
1 |
|
|
T12 |
57 |
|
T115 |
21 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1704 |
1 |
|
|
T12 |
55 |
|
T115 |
21 |
|
T116 |
13 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1737 |
1 |
|
|
T12 |
57 |
|
T115 |
21 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T12 |
54 |
|
T115 |
21 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1706 |
1 |
|
|
T12 |
57 |
|
T115 |
21 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T12 |
51 |
|
T115 |
21 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1673 |
1 |
|
|
T12 |
56 |
|
T115 |
21 |
|
T116 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T12 |
49 |
|
T115 |
21 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1644 |
1 |
|
|
T12 |
53 |
|
T115 |
20 |
|
T116 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T12 |
48 |
|
T115 |
21 |
|
T116 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T12 |
51 |
|
T115 |
18 |
|
T116 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T12 |
47 |
|
T115 |
20 |
|
T116 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T12 |
50 |
|
T115 |
18 |
|
T116 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T12 |
46 |
|
T115 |
20 |
|
T116 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T12 |
47 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T12 |
45 |
|
T115 |
18 |
|
T116 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T12 |
46 |
|
T115 |
17 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T12 |
44 |
|
T115 |
18 |
|
T116 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T12 |
44 |
|
T115 |
17 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T12 |
43 |
|
T115 |
18 |
|
T116 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T12 |
41 |
|
T115 |
16 |
|
T116 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T12 |
42 |
|
T115 |
17 |
|
T116 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T12 |
41 |
|
T115 |
16 |
|
T116 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T12 |
42 |
|
T115 |
17 |
|
T116 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T12 |
38 |
|
T115 |
15 |
|
T116 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T12 |
42 |
|
T115 |
17 |
|
T116 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T12 |
38 |
|
T115 |
13 |
|
T116 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
5 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T12 |
42 |
|
T115 |
17 |
|
T116 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T12 |
25 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T12 |
37 |
|
T115 |
13 |
|
T116 |
9 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61101 |
1 |
|
|
T12 |
1615 |
|
T115 |
681 |
|
T116 |
420 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48132 |
1 |
|
|
T12 |
1144 |
|
T115 |
324 |
|
T116 |
900 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59292 |
1 |
|
|
T12 |
2384 |
|
T115 |
1049 |
|
T116 |
559 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49982 |
1 |
|
|
T12 |
1247 |
|
T115 |
409 |
|
T116 |
174 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T12 |
26 |
|
T115 |
12 |
|
T116 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1766 |
1 |
|
|
T12 |
54 |
|
T115 |
17 |
|
T116 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T12 |
24 |
|
T115 |
12 |
|
T116 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1751 |
1 |
|
|
T12 |
57 |
|
T115 |
18 |
|
T116 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T12 |
26 |
|
T115 |
12 |
|
T116 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1735 |
1 |
|
|
T12 |
53 |
|
T115 |
17 |
|
T116 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T12 |
24 |
|
T115 |
12 |
|
T116 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1711 |
1 |
|
|
T12 |
56 |
|
T115 |
18 |
|
T116 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T12 |
26 |
|
T115 |
12 |
|
T116 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1694 |
1 |
|
|
T12 |
52 |
|
T115 |
17 |
|
T116 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
806 |
1 |
|
|
T12 |
24 |
|
T115 |
12 |
|
T116 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T12 |
55 |
|
T115 |
18 |
|
T116 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T12 |
26 |
|
T115 |
12 |
|
T116 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1668 |
1 |
|
|
T12 |
51 |
|
T115 |
17 |
|
T116 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
806 |
1 |
|
|
T12 |
24 |
|
T115 |
12 |
|
T116 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1645 |
1 |
|
|
T12 |
52 |
|
T115 |
18 |
|
T116 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T12 |
26 |
|
T115 |
12 |
|
T116 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T12 |
51 |
|
T115 |
17 |
|
T116 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T12 |
23 |
|
T115 |
12 |
|
T116 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1614 |
1 |
|
|
T12 |
51 |
|
T115 |
18 |
|
T116 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T12 |
26 |
|
T115 |
12 |
|
T116 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T12 |
51 |
|
T115 |
17 |
|
T116 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T12 |
23 |
|
T115 |
12 |
|
T116 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T12 |
51 |
|
T115 |
17 |
|
T116 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T12 |
26 |
|
T115 |
12 |
|
T116 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T12 |
49 |
|
T115 |
16 |
|
T116 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T12 |
23 |
|
T115 |
12 |
|
T116 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T12 |
51 |
|
T115 |
17 |
|
T116 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
773 |
1 |
|
|
T12 |
26 |
|
T115 |
12 |
|
T116 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T12 |
47 |
|
T115 |
16 |
|
T116 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T12 |
23 |
|
T115 |
12 |
|
T116 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T12 |
50 |
|
T115 |
17 |
|
T116 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
26 |
|
T115 |
12 |
|
T116 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T12 |
47 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T12 |
23 |
|
T115 |
12 |
|
T116 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T12 |
47 |
|
T115 |
17 |
|
T116 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
26 |
|
T115 |
12 |
|
T116 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T12 |
46 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T12 |
23 |
|
T115 |
12 |
|
T116 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T12 |
47 |
|
T115 |
17 |
|
T116 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
26 |
|
T115 |
12 |
|
T116 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T12 |
45 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T12 |
23 |
|
T115 |
11 |
|
T116 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T12 |
46 |
|
T115 |
17 |
|
T116 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
26 |
|
T115 |
12 |
|
T116 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T12 |
44 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
785 |
1 |
|
|
T12 |
23 |
|
T115 |
11 |
|
T116 |
11 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T12 |
46 |
|
T115 |
17 |
|
T116 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
26 |
|
T115 |
12 |
|
T116 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T12 |
42 |
|
T115 |
13 |
|
T116 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T12 |
23 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T12 |
44 |
|
T115 |
17 |
|
T116 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
26 |
|
T115 |
12 |
|
T116 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T12 |
42 |
|
T115 |
12 |
|
T116 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T12 |
23 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T12 |
44 |
|
T115 |
17 |
|
T116 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
26 |
|
T115 |
12 |
|
T116 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T12 |
41 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T12 |
23 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T12 |
44 |
|
T115 |
16 |
|
T116 |
4 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65545 |
1 |
|
|
T12 |
1599 |
|
T115 |
614 |
|
T116 |
347 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45310 |
1 |
|
|
T12 |
1263 |
|
T115 |
1100 |
|
T116 |
429 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58660 |
1 |
|
|
T12 |
1614 |
|
T115 |
522 |
|
T116 |
267 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48947 |
1 |
|
|
T12 |
1954 |
|
T115 |
272 |
|
T116 |
973 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1768 |
1 |
|
|
T12 |
59 |
|
T115 |
20 |
|
T116 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T12 |
19 |
|
T115 |
10 |
|
T116 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1766 |
1 |
|
|
T12 |
62 |
|
T115 |
20 |
|
T116 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1736 |
1 |
|
|
T12 |
58 |
|
T115 |
20 |
|
T116 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T12 |
19 |
|
T115 |
10 |
|
T116 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1729 |
1 |
|
|
T12 |
61 |
|
T115 |
18 |
|
T116 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1701 |
1 |
|
|
T12 |
57 |
|
T115 |
20 |
|
T116 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T12 |
19 |
|
T115 |
10 |
|
T116 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1689 |
1 |
|
|
T12 |
59 |
|
T115 |
17 |
|
T116 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1675 |
1 |
|
|
T12 |
57 |
|
T115 |
20 |
|
T116 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T12 |
19 |
|
T115 |
10 |
|
T116 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1656 |
1 |
|
|
T12 |
58 |
|
T115 |
16 |
|
T116 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T12 |
57 |
|
T115 |
20 |
|
T116 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T12 |
19 |
|
T115 |
10 |
|
T116 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T12 |
56 |
|
T115 |
16 |
|
T116 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T12 |
55 |
|
T115 |
20 |
|
T116 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T12 |
19 |
|
T115 |
10 |
|
T116 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T12 |
55 |
|
T115 |
16 |
|
T116 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T12 |
54 |
|
T115 |
20 |
|
T116 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T12 |
19 |
|
T115 |
10 |
|
T116 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T12 |
54 |
|
T115 |
16 |
|
T116 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T12 |
51 |
|
T115 |
18 |
|
T116 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T12 |
19 |
|
T115 |
10 |
|
T116 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T12 |
52 |
|
T115 |
14 |
|
T116 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T12 |
51 |
|
T115 |
18 |
|
T116 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T12 |
19 |
|
T115 |
10 |
|
T116 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T12 |
51 |
|
T115 |
14 |
|
T116 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T12 |
49 |
|
T115 |
18 |
|
T116 |
14 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T12 |
19 |
|
T115 |
10 |
|
T116 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T12 |
49 |
|
T115 |
13 |
|
T116 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T12 |
49 |
|
T115 |
17 |
|
T116 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T12 |
19 |
|
T115 |
9 |
|
T116 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T12 |
48 |
|
T115 |
13 |
|
T116 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T12 |
48 |
|
T115 |
17 |
|
T116 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T12 |
19 |
|
T115 |
9 |
|
T116 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T12 |
46 |
|
T115 |
13 |
|
T116 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T12 |
46 |
|
T115 |
17 |
|
T116 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T12 |
19 |
|
T115 |
9 |
|
T116 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T12 |
42 |
|
T115 |
13 |
|
T116 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T12 |
45 |
|
T115 |
17 |
|
T116 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T12 |
19 |
|
T115 |
9 |
|
T116 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T12 |
41 |
|
T115 |
12 |
|
T116 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
21 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T12 |
44 |
|
T115 |
17 |
|
T116 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T12 |
19 |
|
T115 |
9 |
|
T116 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T12 |
41 |
|
T115 |
9 |
|
T116 |
8 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57479 |
1 |
|
|
T12 |
1732 |
|
T115 |
1226 |
|
T116 |
288 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51473 |
1 |
|
|
T12 |
1310 |
|
T115 |
324 |
|
T116 |
983 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56445 |
1 |
|
|
T12 |
2074 |
|
T115 |
674 |
|
T116 |
486 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52732 |
1 |
|
|
T12 |
1137 |
|
T115 |
353 |
|
T116 |
208 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T12 |
24 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1781 |
1 |
|
|
T12 |
60 |
|
T115 |
15 |
|
T116 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1818 |
1 |
|
|
T12 |
59 |
|
T115 |
16 |
|
T116 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T12 |
24 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1742 |
1 |
|
|
T12 |
60 |
|
T115 |
14 |
|
T116 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1780 |
1 |
|
|
T12 |
57 |
|
T115 |
16 |
|
T116 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T12 |
24 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1701 |
1 |
|
|
T12 |
60 |
|
T115 |
14 |
|
T116 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1743 |
1 |
|
|
T12 |
56 |
|
T115 |
16 |
|
T116 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
785 |
1 |
|
|
T12 |
24 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1671 |
1 |
|
|
T12 |
59 |
|
T115 |
14 |
|
T116 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T12 |
26 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1704 |
1 |
|
|
T12 |
56 |
|
T115 |
16 |
|
T116 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T12 |
24 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T12 |
58 |
|
T115 |
13 |
|
T116 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T12 |
56 |
|
T115 |
16 |
|
T116 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T12 |
24 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T12 |
57 |
|
T115 |
13 |
|
T116 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T12 |
55 |
|
T115 |
16 |
|
T116 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T12 |
24 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T12 |
57 |
|
T115 |
12 |
|
T116 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T12 |
54 |
|
T115 |
16 |
|
T116 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T12 |
24 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T12 |
55 |
|
T115 |
11 |
|
T116 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T12 |
54 |
|
T115 |
16 |
|
T116 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T12 |
24 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T12 |
54 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T12 |
51 |
|
T115 |
16 |
|
T116 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
779 |
1 |
|
|
T12 |
24 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T12 |
52 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T12 |
25 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T12 |
51 |
|
T115 |
16 |
|
T116 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T12 |
24 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T12 |
51 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T12 |
25 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T12 |
49 |
|
T115 |
16 |
|
T116 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T12 |
24 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T12 |
50 |
|
T115 |
11 |
|
T116 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T12 |
25 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T12 |
48 |
|
T115 |
15 |
|
T116 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T12 |
24 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T12 |
47 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T12 |
25 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T12 |
46 |
|
T115 |
14 |
|
T116 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T12 |
24 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T12 |
47 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T12 |
25 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T12 |
45 |
|
T115 |
14 |
|
T116 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
778 |
1 |
|
|
T12 |
24 |
|
T115 |
11 |
|
T116 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T12 |
44 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T12 |
25 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T12 |
45 |
|
T115 |
14 |
|
T116 |
12 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60648 |
1 |
|
|
T12 |
1749 |
|
T115 |
699 |
|
T116 |
462 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50536 |
1 |
|
|
T12 |
1065 |
|
T115 |
861 |
|
T116 |
190 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59288 |
1 |
|
|
T12 |
2476 |
|
T115 |
408 |
|
T116 |
1338 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48096 |
1 |
|
|
T12 |
1055 |
|
T115 |
578 |
|
T116 |
83 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T12 |
28 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1787 |
1 |
|
|
T12 |
53 |
|
T115 |
18 |
|
T116 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T12 |
29 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1771 |
1 |
|
|
T12 |
53 |
|
T115 |
19 |
|
T116 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T12 |
28 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1740 |
1 |
|
|
T12 |
52 |
|
T115 |
17 |
|
T116 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T12 |
29 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1731 |
1 |
|
|
T12 |
52 |
|
T115 |
19 |
|
T116 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T12 |
28 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1708 |
1 |
|
|
T12 |
52 |
|
T115 |
17 |
|
T116 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T12 |
29 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1701 |
1 |
|
|
T12 |
51 |
|
T115 |
19 |
|
T116 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
760 |
1 |
|
|
T12 |
28 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1670 |
1 |
|
|
T12 |
50 |
|
T115 |
16 |
|
T116 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T12 |
29 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1671 |
1 |
|
|
T12 |
50 |
|
T115 |
19 |
|
T116 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T12 |
28 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1640 |
1 |
|
|
T12 |
49 |
|
T115 |
16 |
|
T116 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T12 |
28 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T12 |
49 |
|
T115 |
18 |
|
T116 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T12 |
28 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T12 |
48 |
|
T115 |
16 |
|
T116 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T12 |
28 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T12 |
48 |
|
T115 |
18 |
|
T116 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T12 |
28 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T12 |
47 |
|
T115 |
16 |
|
T116 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T12 |
28 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T12 |
48 |
|
T115 |
17 |
|
T116 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T12 |
28 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T12 |
47 |
|
T115 |
16 |
|
T116 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T12 |
28 |
|
T115 |
9 |
|
T116 |
11 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T12 |
48 |
|
T115 |
17 |
|
T116 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
28 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T12 |
47 |
|
T115 |
15 |
|
T116 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T12 |
28 |
|
T115 |
9 |
|
T116 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T12 |
47 |
|
T115 |
17 |
|
T116 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
28 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T12 |
45 |
|
T115 |
13 |
|
T116 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T12 |
28 |
|
T115 |
9 |
|
T116 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T12 |
45 |
|
T115 |
17 |
|
T116 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
28 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T12 |
43 |
|
T115 |
12 |
|
T116 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T12 |
28 |
|
T115 |
8 |
|
T116 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T12 |
44 |
|
T115 |
16 |
|
T116 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
28 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T12 |
43 |
|
T115 |
11 |
|
T116 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T12 |
28 |
|
T115 |
8 |
|
T116 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T12 |
44 |
|
T115 |
16 |
|
T116 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
28 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T12 |
42 |
|
T115 |
11 |
|
T116 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T12 |
28 |
|
T115 |
8 |
|
T116 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T12 |
42 |
|
T115 |
16 |
|
T116 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
28 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T12 |
39 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T12 |
28 |
|
T115 |
8 |
|
T116 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T12 |
41 |
|
T115 |
16 |
|
T116 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
28 |
|
T115 |
10 |
|
T116 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T12 |
38 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T12 |
28 |
|
T115 |
8 |
|
T116 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T12 |
39 |
|
T115 |
16 |
|
T116 |
5 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54769 |
1 |
|
|
T12 |
1711 |
|
T115 |
623 |
|
T116 |
386 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
54444 |
1 |
|
|
T12 |
1179 |
|
T115 |
1102 |
|
T116 |
265 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60593 |
1 |
|
|
T12 |
2425 |
|
T115 |
304 |
|
T116 |
1030 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48520 |
1 |
|
|
T12 |
1093 |
|
T115 |
385 |
|
T116 |
262 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
24 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1783 |
1 |
|
|
T12 |
56 |
|
T115 |
27 |
|
T116 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T12 |
24 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1782 |
1 |
|
|
T12 |
57 |
|
T115 |
24 |
|
T116 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
24 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1755 |
1 |
|
|
T12 |
56 |
|
T115 |
27 |
|
T116 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T12 |
24 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1738 |
1 |
|
|
T12 |
56 |
|
T115 |
24 |
|
T116 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
24 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1724 |
1 |
|
|
T12 |
56 |
|
T115 |
27 |
|
T116 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T12 |
24 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1699 |
1 |
|
|
T12 |
54 |
|
T115 |
21 |
|
T116 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
770 |
1 |
|
|
T12 |
24 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1694 |
1 |
|
|
T12 |
53 |
|
T115 |
27 |
|
T116 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T12 |
24 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T12 |
54 |
|
T115 |
21 |
|
T116 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T12 |
24 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T12 |
53 |
|
T115 |
27 |
|
T116 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T12 |
23 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T12 |
53 |
|
T115 |
21 |
|
T116 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T12 |
24 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T12 |
52 |
|
T115 |
25 |
|
T116 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T12 |
23 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T12 |
52 |
|
T115 |
21 |
|
T116 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T12 |
24 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T12 |
52 |
|
T115 |
24 |
|
T116 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T12 |
23 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T12 |
50 |
|
T115 |
21 |
|
T116 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
764 |
1 |
|
|
T12 |
24 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T12 |
51 |
|
T115 |
24 |
|
T116 |
13 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T12 |
23 |
|
T115 |
8 |
|
T116 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T12 |
46 |
|
T115 |
21 |
|
T116 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T12 |
24 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T12 |
49 |
|
T115 |
24 |
|
T116 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T12 |
23 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T12 |
46 |
|
T115 |
21 |
|
T116 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T12 |
24 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T12 |
46 |
|
T115 |
24 |
|
T116 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T12 |
23 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T12 |
45 |
|
T115 |
21 |
|
T116 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T12 |
24 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T12 |
46 |
|
T115 |
23 |
|
T116 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T12 |
23 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T12 |
44 |
|
T115 |
18 |
|
T116 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T12 |
24 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T12 |
46 |
|
T115 |
23 |
|
T116 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T12 |
23 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T12 |
44 |
|
T115 |
18 |
|
T116 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T12 |
24 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T12 |
46 |
|
T115 |
23 |
|
T116 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T12 |
23 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T12 |
41 |
|
T115 |
17 |
|
T116 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T12 |
24 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T12 |
43 |
|
T115 |
22 |
|
T116 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T12 |
23 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T12 |
40 |
|
T115 |
17 |
|
T116 |
14 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
762 |
1 |
|
|
T12 |
24 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T12 |
42 |
|
T115 |
22 |
|
T116 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T12 |
23 |
|
T115 |
8 |
|
T116 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T12 |
39 |
|
T115 |
17 |
|
T116 |
12 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60246 |
1 |
|
|
T12 |
1605 |
|
T115 |
496 |
|
T116 |
284 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46147 |
1 |
|
|
T12 |
1812 |
|
T115 |
243 |
|
T116 |
445 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64237 |
1 |
|
|
T12 |
1687 |
|
T115 |
1595 |
|
T116 |
324 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49878 |
1 |
|
|
T12 |
1351 |
|
T115 |
377 |
|
T116 |
979 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1712 |
1 |
|
|
T12 |
52 |
|
T115 |
16 |
|
T116 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T12 |
52 |
|
T115 |
13 |
|
T116 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1680 |
1 |
|
|
T12 |
49 |
|
T115 |
15 |
|
T116 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1681 |
1 |
|
|
T12 |
52 |
|
T115 |
13 |
|
T116 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T12 |
48 |
|
T115 |
15 |
|
T116 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T12 |
52 |
|
T115 |
13 |
|
T116 |
14 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
758 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T12 |
46 |
|
T115 |
14 |
|
T116 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T12 |
51 |
|
T115 |
13 |
|
T116 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T12 |
44 |
|
T115 |
13 |
|
T116 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T12 |
51 |
|
T115 |
12 |
|
T116 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T12 |
40 |
|
T115 |
13 |
|
T116 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T12 |
51 |
|
T115 |
12 |
|
T116 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T12 |
38 |
|
T115 |
13 |
|
T116 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T12 |
50 |
|
T115 |
13 |
|
T116 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
757 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T12 |
37 |
|
T115 |
13 |
|
T116 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T12 |
49 |
|
T115 |
13 |
|
T116 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T12 |
36 |
|
T115 |
11 |
|
T116 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T12 |
47 |
|
T115 |
12 |
|
T116 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T12 |
35 |
|
T115 |
11 |
|
T116 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T12 |
47 |
|
T115 |
11 |
|
T116 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T12 |
35 |
|
T115 |
11 |
|
T116 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T12 |
46 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T12 |
34 |
|
T115 |
10 |
|
T116 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T12 |
46 |
|
T115 |
10 |
|
T116 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T12 |
33 |
|
T115 |
10 |
|
T116 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T12 |
46 |
|
T115 |
10 |
|
T116 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T12 |
32 |
|
T115 |
10 |
|
T116 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T12 |
46 |
|
T115 |
10 |
|
T116 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
27 |
|
T115 |
6 |
|
T116 |
6 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T12 |
32 |
|
T115 |
10 |
|
T116 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T12 |
43 |
|
T115 |
10 |
|
T116 |
9 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59326 |
1 |
|
|
T12 |
1696 |
|
T115 |
1157 |
|
T116 |
1215 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43011 |
1 |
|
|
T12 |
1156 |
|
T115 |
421 |
|
T116 |
196 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64056 |
1 |
|
|
T12 |
2837 |
|
T115 |
590 |
|
T116 |
443 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51442 |
1 |
|
|
T12 |
955 |
|
T115 |
347 |
|
T116 |
260 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T12 |
23 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1816 |
1 |
|
|
T12 |
49 |
|
T115 |
14 |
|
T116 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T12 |
27 |
|
T115 |
12 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1850 |
1 |
|
|
T12 |
46 |
|
T115 |
16 |
|
T116 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T12 |
23 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1789 |
1 |
|
|
T12 |
48 |
|
T115 |
14 |
|
T116 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T12 |
27 |
|
T115 |
12 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1824 |
1 |
|
|
T12 |
43 |
|
T115 |
16 |
|
T116 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T12 |
23 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1758 |
1 |
|
|
T12 |
47 |
|
T115 |
14 |
|
T116 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T12 |
27 |
|
T115 |
12 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1787 |
1 |
|
|
T12 |
42 |
|
T115 |
15 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T12 |
23 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1732 |
1 |
|
|
T12 |
46 |
|
T115 |
13 |
|
T116 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T12 |
27 |
|
T115 |
12 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1745 |
1 |
|
|
T12 |
41 |
|
T115 |
15 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T12 |
23 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1699 |
1 |
|
|
T12 |
46 |
|
T115 |
13 |
|
T116 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T12 |
26 |
|
T115 |
12 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T12 |
39 |
|
T115 |
15 |
|
T116 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T12 |
23 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1653 |
1 |
|
|
T12 |
45 |
|
T115 |
13 |
|
T116 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T12 |
26 |
|
T115 |
12 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T12 |
38 |
|
T115 |
15 |
|
T116 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T12 |
23 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T12 |
44 |
|
T115 |
13 |
|
T116 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T12 |
26 |
|
T115 |
11 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T12 |
37 |
|
T115 |
16 |
|
T116 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T12 |
23 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T12 |
44 |
|
T115 |
13 |
|
T116 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T12 |
26 |
|
T115 |
11 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T12 |
35 |
|
T115 |
15 |
|
T116 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T12 |
23 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T12 |
43 |
|
T115 |
13 |
|
T116 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T12 |
26 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T12 |
35 |
|
T115 |
15 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T12 |
23 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T12 |
43 |
|
T115 |
13 |
|
T116 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T12 |
26 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T12 |
35 |
|
T115 |
13 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T12 |
23 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T12 |
41 |
|
T115 |
13 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T12 |
26 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T12 |
33 |
|
T115 |
12 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T12 |
23 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T12 |
40 |
|
T115 |
13 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T12 |
26 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T12 |
32 |
|
T115 |
12 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T12 |
23 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T12 |
40 |
|
T115 |
13 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T12 |
26 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T12 |
32 |
|
T115 |
12 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T12 |
23 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T12 |
39 |
|
T115 |
13 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T12 |
26 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T12 |
30 |
|
T115 |
12 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T12 |
23 |
|
T115 |
14 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T12 |
39 |
|
T115 |
12 |
|
T116 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T12 |
26 |
|
T115 |
11 |
|
T116 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T12 |
30 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56800 |
1 |
|
|
T12 |
1619 |
|
T115 |
685 |
|
T116 |
313 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48860 |
1 |
|
|
T12 |
1140 |
|
T115 |
874 |
|
T116 |
182 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61047 |
1 |
|
|
T12 |
1741 |
|
T115 |
585 |
|
T116 |
448 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51212 |
1 |
|
|
T12 |
1938 |
|
T115 |
336 |
|
T116 |
1062 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1811 |
1 |
|
|
T12 |
59 |
|
T115 |
18 |
|
T116 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1811 |
1 |
|
|
T12 |
53 |
|
T115 |
19 |
|
T116 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1782 |
1 |
|
|
T12 |
59 |
|
T115 |
18 |
|
T116 |
15 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1783 |
1 |
|
|
T12 |
53 |
|
T115 |
19 |
|
T116 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1744 |
1 |
|
|
T12 |
57 |
|
T115 |
18 |
|
T116 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1749 |
1 |
|
|
T12 |
51 |
|
T115 |
19 |
|
T116 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1703 |
1 |
|
|
T12 |
56 |
|
T115 |
17 |
|
T116 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1708 |
1 |
|
|
T12 |
50 |
|
T115 |
19 |
|
T116 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1676 |
1 |
|
|
T12 |
55 |
|
T115 |
17 |
|
T116 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T12 |
49 |
|
T115 |
19 |
|
T116 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T12 |
54 |
|
T115 |
16 |
|
T116 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T12 |
27 |
|
T115 |
10 |
|
T116 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T12 |
47 |
|
T115 |
19 |
|
T116 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T12 |
53 |
|
T115 |
16 |
|
T116 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T12 |
45 |
|
T115 |
20 |
|
T116 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T12 |
53 |
|
T115 |
16 |
|
T116 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T12 |
43 |
|
T115 |
20 |
|
T116 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T12 |
51 |
|
T115 |
16 |
|
T116 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T12 |
42 |
|
T115 |
20 |
|
T116 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T12 |
51 |
|
T115 |
15 |
|
T116 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
753 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T12 |
42 |
|
T115 |
19 |
|
T116 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T12 |
51 |
|
T115 |
15 |
|
T116 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T12 |
39 |
|
T115 |
18 |
|
T116 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T12 |
50 |
|
T115 |
15 |
|
T116 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T12 |
37 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T12 |
49 |
|
T115 |
14 |
|
T116 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T12 |
35 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T12 |
48 |
|
T115 |
14 |
|
T116 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T12 |
32 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T12 |
20 |
|
T115 |
11 |
|
T116 |
4 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T12 |
47 |
|
T115 |
12 |
|
T116 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T12 |
27 |
|
T115 |
9 |
|
T116 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T12 |
31 |
|
T115 |
17 |
|
T116 |
11 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59683 |
1 |
|
|
T12 |
2162 |
|
T115 |
586 |
|
T116 |
1011 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53753 |
1 |
|
|
T12 |
1329 |
|
T115 |
372 |
|
T116 |
356 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60633 |
1 |
|
|
T12 |
1732 |
|
T115 |
905 |
|
T116 |
181 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44039 |
1 |
|
|
T12 |
1176 |
|
T115 |
474 |
|
T116 |
325 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T12 |
22 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1812 |
1 |
|
|
T12 |
59 |
|
T115 |
26 |
|
T116 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1789 |
1 |
|
|
T12 |
57 |
|
T115 |
30 |
|
T116 |
18 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T12 |
22 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1784 |
1 |
|
|
T12 |
59 |
|
T115 |
26 |
|
T116 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1755 |
1 |
|
|
T12 |
56 |
|
T115 |
28 |
|
T116 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T12 |
22 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1749 |
1 |
|
|
T12 |
58 |
|
T115 |
24 |
|
T116 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1719 |
1 |
|
|
T12 |
54 |
|
T115 |
28 |
|
T116 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T12 |
22 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1722 |
1 |
|
|
T12 |
56 |
|
T115 |
23 |
|
T116 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1684 |
1 |
|
|
T12 |
54 |
|
T115 |
27 |
|
T116 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T12 |
22 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1692 |
1 |
|
|
T12 |
55 |
|
T115 |
22 |
|
T116 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T12 |
23 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T12 |
51 |
|
T115 |
27 |
|
T116 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T12 |
22 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T12 |
51 |
|
T115 |
22 |
|
T116 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T12 |
23 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T12 |
49 |
|
T115 |
27 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T12 |
22 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T12 |
50 |
|
T115 |
22 |
|
T116 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T12 |
23 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T12 |
49 |
|
T115 |
28 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T12 |
22 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T12 |
50 |
|
T115 |
21 |
|
T116 |
19 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T12 |
23 |
|
T115 |
6 |
|
T116 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T12 |
48 |
|
T115 |
28 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T12 |
22 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T12 |
50 |
|
T115 |
20 |
|
T116 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T12 |
23 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T12 |
47 |
|
T115 |
28 |
|
T116 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T12 |
22 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T12 |
50 |
|
T115 |
20 |
|
T116 |
17 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
762 |
1 |
|
|
T12 |
23 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T12 |
46 |
|
T115 |
27 |
|
T116 |
15 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T12 |
22 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T12 |
50 |
|
T115 |
20 |
|
T116 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T12 |
23 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T12 |
46 |
|
T115 |
27 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T12 |
22 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T12 |
49 |
|
T115 |
18 |
|
T116 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T12 |
23 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T12 |
44 |
|
T115 |
26 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T12 |
22 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T12 |
48 |
|
T115 |
17 |
|
T116 |
16 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T12 |
23 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T12 |
43 |
|
T115 |
26 |
|
T116 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T12 |
22 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T12 |
48 |
|
T115 |
15 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T12 |
23 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T12 |
42 |
|
T115 |
26 |
|
T116 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T12 |
22 |
|
T115 |
10 |
|
T116 |
4 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T12 |
48 |
|
T115 |
14 |
|
T116 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T12 |
23 |
|
T115 |
6 |
|
T116 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T12 |
40 |
|
T115 |
26 |
|
T116 |
12 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63633 |
1 |
|
|
T12 |
1429 |
|
T115 |
977 |
|
T116 |
417 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44757 |
1 |
|
|
T12 |
1167 |
|
T115 |
591 |
|
T116 |
114 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64927 |
1 |
|
|
T12 |
1770 |
|
T115 |
400 |
|
T116 |
1345 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45791 |
1 |
|
|
T12 |
2005 |
|
T115 |
426 |
|
T116 |
180 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T12 |
26 |
|
T115 |
2 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1740 |
1 |
|
|
T12 |
56 |
|
T115 |
31 |
|
T116 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T12 |
25 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1745 |
1 |
|
|
T12 |
58 |
|
T115 |
26 |
|
T116 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T12 |
26 |
|
T115 |
2 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1707 |
1 |
|
|
T12 |
55 |
|
T115 |
31 |
|
T116 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T12 |
25 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1715 |
1 |
|
|
T12 |
58 |
|
T115 |
26 |
|
T116 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T12 |
26 |
|
T115 |
2 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T12 |
53 |
|
T115 |
31 |
|
T116 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T12 |
25 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1685 |
1 |
|
|
T12 |
58 |
|
T115 |
25 |
|
T116 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T12 |
26 |
|
T115 |
2 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T12 |
52 |
|
T115 |
30 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T12 |
25 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1648 |
1 |
|
|
T12 |
56 |
|
T115 |
24 |
|
T116 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T12 |
26 |
|
T115 |
2 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1590 |
1 |
|
|
T12 |
50 |
|
T115 |
29 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T12 |
52 |
|
T115 |
24 |
|
T116 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T12 |
26 |
|
T115 |
2 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T12 |
49 |
|
T115 |
29 |
|
T116 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T12 |
51 |
|
T115 |
24 |
|
T116 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T12 |
26 |
|
T115 |
2 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T12 |
48 |
|
T115 |
29 |
|
T116 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T12 |
51 |
|
T115 |
24 |
|
T116 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T12 |
26 |
|
T115 |
2 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T12 |
47 |
|
T115 |
29 |
|
T116 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T12 |
51 |
|
T115 |
23 |
|
T116 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T12 |
26 |
|
T115 |
2 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T12 |
46 |
|
T115 |
29 |
|
T116 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T12 |
49 |
|
T115 |
22 |
|
T116 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T12 |
26 |
|
T115 |
2 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T12 |
45 |
|
T115 |
29 |
|
T116 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T12 |
46 |
|
T115 |
22 |
|
T116 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T12 |
26 |
|
T115 |
2 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T12 |
43 |
|
T115 |
28 |
|
T116 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T12 |
45 |
|
T115 |
22 |
|
T116 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
776 |
1 |
|
|
T12 |
26 |
|
T115 |
2 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T12 |
43 |
|
T115 |
28 |
|
T116 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
767 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T12 |
45 |
|
T115 |
21 |
|
T116 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T12 |
26 |
|
T115 |
2 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T12 |
41 |
|
T115 |
27 |
|
T116 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T12 |
45 |
|
T115 |
20 |
|
T116 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T12 |
26 |
|
T115 |
2 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T12 |
41 |
|
T115 |
26 |
|
T116 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T12 |
44 |
|
T115 |
19 |
|
T116 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T12 |
26 |
|
T115 |
2 |
|
T116 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T12 |
41 |
|
T115 |
26 |
|
T116 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T12 |
24 |
|
T115 |
7 |
|
T116 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T12 |
41 |
|
T115 |
19 |
|
T116 |
9 |