Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8524141 |
1 |
|
|
T22 |
137 |
|
T23 |
235 |
|
T24 |
141817 |
| auto[1] |
6239547 |
1 |
|
|
T24 |
133970 |
|
T25 |
31888 |
|
T1 |
46052 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12176118 |
1 |
|
|
T22 |
137 |
|
T23 |
235 |
|
T24 |
219050 |
| auto[1] |
2587570 |
1 |
|
|
T24 |
56737 |
|
T25 |
17982 |
|
T1 |
32236 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8516805 |
1 |
|
|
T22 |
137 |
|
T23 |
235 |
|
T24 |
131055 |
| auto[1] |
6246883 |
1 |
|
|
T24 |
144732 |
|
T25 |
31122 |
|
T1 |
49808 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1827613 |
1 |
|
|
T24 |
45511 |
|
T25 |
6446 |
|
T1 |
9204 |
| auto[1] |
auto[0] |
auto[1] |
1296210 |
1 |
|
|
T24 |
29014 |
|
T25 |
8895 |
|
T1 |
16774 |
| auto[1] |
auto[1] |
auto[0] |
1831700 |
1 |
|
|
T24 |
42484 |
|
T25 |
6694 |
|
T1 |
8368 |
| auto[1] |
auto[1] |
auto[1] |
1291360 |
1 |
|
|
T24 |
27723 |
|
T25 |
9087 |
|
T1 |
15462 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |