Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8523257 |
1 |
|
|
T22 |
137 |
|
T23 |
235 |
|
T24 |
138935 |
| auto[1] |
6240431 |
1 |
|
|
T24 |
136852 |
|
T25 |
32974 |
|
T1 |
46419 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12181983 |
1 |
|
|
T22 |
137 |
|
T23 |
235 |
|
T24 |
220934 |
| auto[1] |
2581705 |
1 |
|
|
T24 |
54853 |
|
T25 |
18645 |
|
T1 |
31836 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8525685 |
1 |
|
|
T22 |
137 |
|
T23 |
235 |
|
T24 |
136045 |
| auto[1] |
6238003 |
1 |
|
|
T24 |
139742 |
|
T25 |
31622 |
|
T1 |
48805 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1835692 |
1 |
|
|
T24 |
42489 |
|
T25 |
6073 |
|
T1 |
8589 |
| auto[1] |
auto[0] |
auto[1] |
1292764 |
1 |
|
|
T24 |
27285 |
|
T25 |
8932 |
|
T1 |
15850 |
| auto[1] |
auto[1] |
auto[0] |
1820606 |
1 |
|
|
T24 |
42400 |
|
T25 |
6904 |
|
T1 |
8380 |
| auto[1] |
auto[1] |
auto[1] |
1288941 |
1 |
|
|
T24 |
27568 |
|
T25 |
9713 |
|
T1 |
15986 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |