Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8538868 |
1 |
|
|
T22 |
137 |
|
T23 |
235 |
|
T24 |
137056 |
| auto[1] |
6224820 |
1 |
|
|
T24 |
138731 |
|
T25 |
31726 |
|
T1 |
46587 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12183822 |
1 |
|
|
T22 |
137 |
|
T23 |
235 |
|
T24 |
222132 |
| auto[1] |
2579866 |
1 |
|
|
T24 |
53655 |
|
T25 |
18233 |
|
T1 |
32356 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8543739 |
1 |
|
|
T22 |
137 |
|
T23 |
235 |
|
T24 |
139861 |
| auto[1] |
6219949 |
1 |
|
|
T24 |
135926 |
|
T25 |
31166 |
|
T1 |
49695 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1827155 |
1 |
|
|
T24 |
40469 |
|
T25 |
6333 |
|
T1 |
8984 |
| auto[1] |
auto[0] |
auto[1] |
1295339 |
1 |
|
|
T24 |
26130 |
|
T25 |
8565 |
|
T1 |
16688 |
| auto[1] |
auto[1] |
auto[0] |
1812928 |
1 |
|
|
T24 |
41802 |
|
T25 |
6600 |
|
T1 |
8355 |
| auto[1] |
auto[1] |
auto[1] |
1284527 |
1 |
|
|
T24 |
27525 |
|
T25 |
9668 |
|
T1 |
15668 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |