Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8530422 |
1 |
|
|
T22 |
137 |
|
T23 |
235 |
|
T24 |
140236 |
| auto[1] |
6233266 |
1 |
|
|
T24 |
135551 |
|
T25 |
30623 |
|
T1 |
48103 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12185774 |
1 |
|
|
T22 |
137 |
|
T23 |
235 |
|
T24 |
222007 |
| auto[1] |
2577914 |
1 |
|
|
T24 |
53780 |
|
T25 |
17719 |
|
T1 |
32035 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8526281 |
1 |
|
|
T22 |
137 |
|
T23 |
235 |
|
T24 |
140715 |
| auto[1] |
6237407 |
1 |
|
|
T24 |
135072 |
|
T25 |
30616 |
|
T1 |
48617 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1833475 |
1 |
|
|
T24 |
41267 |
|
T25 |
6083 |
|
T1 |
8412 |
| auto[1] |
auto[0] |
auto[1] |
1295746 |
1 |
|
|
T24 |
27883 |
|
T25 |
8624 |
|
T1 |
16583 |
| auto[1] |
auto[1] |
auto[0] |
1826018 |
1 |
|
|
T24 |
40025 |
|
T25 |
6814 |
|
T1 |
8170 |
| auto[1] |
auto[1] |
auto[1] |
1282168 |
1 |
|
|
T24 |
25897 |
|
T25 |
9095 |
|
T1 |
15452 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |