Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8500902 |
1 |
|
|
T22 |
137 |
|
T23 |
235 |
|
T24 |
132823 |
| auto[1] |
6262786 |
1 |
|
|
T24 |
142964 |
|
T25 |
29855 |
|
T1 |
48076 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12179909 |
1 |
|
|
T22 |
137 |
|
T23 |
235 |
|
T24 |
221624 |
| auto[1] |
2583779 |
1 |
|
|
T24 |
54163 |
|
T25 |
17988 |
|
T1 |
31455 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8532666 |
1 |
|
|
T22 |
137 |
|
T23 |
235 |
|
T24 |
137969 |
| auto[1] |
6231022 |
1 |
|
|
T24 |
137818 |
|
T25 |
30723 |
|
T1 |
48732 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1817839 |
1 |
|
|
T24 |
39951 |
|
T25 |
6793 |
|
T1 |
8856 |
| auto[1] |
auto[0] |
auto[1] |
1290065 |
1 |
|
|
T24 |
26473 |
|
T25 |
9773 |
|
T1 |
15929 |
| auto[1] |
auto[1] |
auto[0] |
1829404 |
1 |
|
|
T24 |
43704 |
|
T25 |
5942 |
|
T1 |
8421 |
| auto[1] |
auto[1] |
auto[1] |
1293714 |
1 |
|
|
T24 |
27690 |
|
T25 |
8215 |
|
T1 |
15526 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |