Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8521863 |
1 |
|
|
T22 |
137 |
|
T23 |
235 |
|
T24 |
141173 |
| auto[1] |
6241825 |
1 |
|
|
T24 |
134614 |
|
T25 |
30243 |
|
T1 |
45815 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13951677 |
1 |
|
|
T22 |
137 |
|
T23 |
235 |
|
T24 |
256408 |
| auto[1] |
812011 |
1 |
|
|
T24 |
19379 |
|
T25 |
4564 |
|
T1 |
5066 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8484860 |
1 |
|
|
T22 |
137 |
|
T23 |
235 |
|
T24 |
135340 |
| auto[1] |
6278828 |
1 |
|
|
T24 |
140447 |
|
T25 |
32507 |
|
T1 |
47643 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2731599 |
1 |
|
|
T24 |
62233 |
|
T25 |
14489 |
|
T1 |
21814 |
| auto[1] |
auto[0] |
auto[1] |
406690 |
1 |
|
|
T24 |
10050 |
|
T25 |
2344 |
|
T1 |
2689 |
| auto[1] |
auto[1] |
auto[0] |
2735218 |
1 |
|
|
T24 |
58835 |
|
T25 |
13454 |
|
T1 |
20763 |
| auto[1] |
auto[1] |
auto[1] |
405321 |
1 |
|
|
T24 |
9329 |
|
T25 |
2220 |
|
T1 |
2377 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |