Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7362377 |
1 |
|
|
T1 |
971 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
5159826 |
1 |
|
|
T1 |
964 |
|
T13 |
76 |
|
T19 |
11145 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11863812 |
1 |
|
|
T1 |
1902 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
658391 |
1 |
|
|
T1 |
33 |
|
T13 |
2 |
|
T19 |
1768 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7368527 |
1 |
|
|
T1 |
1054 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
5153676 |
1 |
|
|
T1 |
881 |
|
T13 |
72 |
|
T19 |
12713 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2252550 |
1 |
|
|
T1 |
453 |
|
T13 |
56 |
|
T19 |
5780 |
| auto[1] |
auto[0] |
auto[1] |
329223 |
1 |
|
|
T1 |
21 |
|
T13 |
1 |
|
T19 |
913 |
| auto[1] |
auto[1] |
auto[0] |
2242735 |
1 |
|
|
T1 |
395 |
|
T13 |
14 |
|
T19 |
5165 |
| auto[1] |
auto[1] |
auto[1] |
329168 |
1 |
|
|
T1 |
12 |
|
T13 |
1 |
|
T19 |
855 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |