Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7344738 |
1 |
|
|
T1 |
882 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
5177465 |
1 |
|
|
T1 |
1053 |
|
T13 |
92 |
|
T15 |
3 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10392562 |
1 |
|
|
T1 |
1702 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
2129641 |
1 |
|
|
T1 |
233 |
|
T19 |
7186 |
|
T105 |
541 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7365639 |
1 |
|
|
T1 |
974 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
5156564 |
1 |
|
|
T1 |
961 |
|
T13 |
75 |
|
T19 |
12273 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1507908 |
1 |
|
|
T1 |
353 |
|
T13 |
52 |
|
T19 |
2501 |
| auto[1] |
auto[0] |
auto[1] |
1063416 |
1 |
|
|
T1 |
109 |
|
T19 |
3180 |
|
T105 |
273 |
| auto[1] |
auto[1] |
auto[0] |
1519015 |
1 |
|
|
T1 |
375 |
|
T13 |
23 |
|
T19 |
2586 |
| auto[1] |
auto[1] |
auto[1] |
1066225 |
1 |
|
|
T1 |
124 |
|
T19 |
4006 |
|
T105 |
268 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |