Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7346487 |
1 |
|
|
T1 |
893 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
5175716 |
1 |
|
|
T1 |
1042 |
|
T13 |
125 |
|
T19 |
12914 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10395835 |
1 |
|
|
T1 |
1672 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
2126368 |
1 |
|
|
T1 |
263 |
|
T13 |
44 |
|
T19 |
7215 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7372556 |
1 |
|
|
T1 |
764 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
5149647 |
1 |
|
|
T1 |
1171 |
|
T13 |
79 |
|
T19 |
12268 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1494234 |
1 |
|
|
T1 |
411 |
|
T13 |
12 |
|
T19 |
2355 |
| auto[1] |
auto[0] |
auto[1] |
1059049 |
1 |
|
|
T1 |
157 |
|
T13 |
29 |
|
T19 |
3637 |
| auto[1] |
auto[1] |
auto[0] |
1529045 |
1 |
|
|
T1 |
497 |
|
T13 |
23 |
|
T19 |
2698 |
| auto[1] |
auto[1] |
auto[1] |
1067319 |
1 |
|
|
T1 |
106 |
|
T13 |
15 |
|
T19 |
3578 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |