Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7383601 |
1 |
|
|
T1 |
888 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
5138602 |
1 |
|
|
T1 |
1047 |
|
T13 |
78 |
|
T15 |
3 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10374177 |
1 |
|
|
T1 |
1693 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
2148026 |
1 |
|
|
T1 |
242 |
|
T13 |
43 |
|
T19 |
7174 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7320886 |
1 |
|
|
T1 |
1125 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
5201317 |
1 |
|
|
T1 |
810 |
|
T13 |
92 |
|
T19 |
12232 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1538010 |
1 |
|
|
T1 |
262 |
|
T13 |
16 |
|
T19 |
2591 |
| auto[1] |
auto[0] |
auto[1] |
1077655 |
1 |
|
|
T1 |
106 |
|
T13 |
23 |
|
T19 |
3745 |
| auto[1] |
auto[1] |
auto[0] |
1515281 |
1 |
|
|
T1 |
306 |
|
T13 |
33 |
|
T19 |
2467 |
| auto[1] |
auto[1] |
auto[1] |
1070371 |
1 |
|
|
T1 |
136 |
|
T13 |
20 |
|
T19 |
3429 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |