Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7349603 |
1 |
|
|
T1 |
928 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
5172600 |
1 |
|
|
T1 |
1007 |
|
T13 |
113 |
|
T15 |
3 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10411096 |
1 |
|
|
T1 |
1729 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
2111107 |
1 |
|
|
T1 |
206 |
|
T13 |
33 |
|
T19 |
6649 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7415730 |
1 |
|
|
T1 |
997 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
5106473 |
1 |
|
|
T1 |
938 |
|
T13 |
94 |
|
T19 |
11528 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1491363 |
1 |
|
|
T1 |
316 |
|
T13 |
31 |
|
T19 |
2303 |
| auto[1] |
auto[0] |
auto[1] |
1055488 |
1 |
|
|
T1 |
107 |
|
T13 |
14 |
|
T19 |
3334 |
| auto[1] |
auto[1] |
auto[0] |
1504003 |
1 |
|
|
T1 |
416 |
|
T13 |
30 |
|
T19 |
2576 |
| auto[1] |
auto[1] |
auto[1] |
1055619 |
1 |
|
|
T1 |
99 |
|
T13 |
19 |
|
T19 |
3315 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |