Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7382113 |
1 |
|
|
T1 |
1025 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
5140090 |
1 |
|
|
T1 |
910 |
|
T13 |
118 |
|
T15 |
3 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10396294 |
1 |
|
|
T1 |
1765 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
2125909 |
1 |
|
|
T1 |
170 |
|
T13 |
23 |
|
T19 |
8189 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7390468 |
1 |
|
|
T1 |
1092 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
5131735 |
1 |
|
|
T1 |
843 |
|
T13 |
88 |
|
T15 |
2 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1505587 |
1 |
|
|
T1 |
377 |
|
T13 |
30 |
|
T15 |
2 |
| auto[1] |
auto[0] |
auto[1] |
1065055 |
1 |
|
|
T1 |
76 |
|
T13 |
14 |
|
T19 |
4240 |
| auto[1] |
auto[1] |
auto[0] |
1500239 |
1 |
|
|
T1 |
296 |
|
T13 |
35 |
|
T19 |
2661 |
| auto[1] |
auto[1] |
auto[1] |
1060854 |
1 |
|
|
T1 |
94 |
|
T13 |
9 |
|
T19 |
3949 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |