Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7389047 |
1 |
|
|
T1 |
956 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
5133156 |
1 |
|
|
T1 |
979 |
|
T13 |
43 |
|
T19 |
12187 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11864466 |
1 |
|
|
T1 |
1882 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
657737 |
1 |
|
|
T1 |
53 |
|
T13 |
5 |
|
T19 |
1614 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7374298 |
1 |
|
|
T1 |
869 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
5147905 |
1 |
|
|
T1 |
1066 |
|
T13 |
94 |
|
T19 |
11793 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2264746 |
1 |
|
|
T1 |
465 |
|
T13 |
75 |
|
T19 |
5268 |
| auto[1] |
auto[0] |
auto[1] |
331201 |
1 |
|
|
T1 |
20 |
|
T13 |
4 |
|
T19 |
844 |
| auto[1] |
auto[1] |
auto[0] |
2225422 |
1 |
|
|
T1 |
548 |
|
T13 |
14 |
|
T19 |
4911 |
| auto[1] |
auto[1] |
auto[1] |
326536 |
1 |
|
|
T1 |
33 |
|
T13 |
1 |
|
T19 |
770 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |