Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7385048 |
1 |
|
|
T1 |
865 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
5137155 |
1 |
|
|
T1 |
1070 |
|
T13 |
137 |
|
T19 |
12441 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11869245 |
1 |
|
|
T1 |
1893 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
652958 |
1 |
|
|
T1 |
42 |
|
T13 |
3 |
|
T19 |
1623 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7408117 |
1 |
|
|
T1 |
894 |
|
T11 |
44 |
|
T12 |
31 |
| auto[1] |
5114086 |
1 |
|
|
T1 |
1041 |
|
T13 |
107 |
|
T15 |
4 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2233213 |
1 |
|
|
T1 |
420 |
|
T13 |
31 |
|
T15 |
4 |
| auto[1] |
auto[0] |
auto[1] |
326505 |
1 |
|
|
T1 |
18 |
|
T13 |
2 |
|
T19 |
799 |
| auto[1] |
auto[1] |
auto[0] |
2227915 |
1 |
|
|
T1 |
579 |
|
T13 |
73 |
|
T19 |
5236 |
| auto[1] |
auto[1] |
auto[1] |
326453 |
1 |
|
|
T1 |
24 |
|
T13 |
1 |
|
T19 |
824 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |