Unified Coverage Report :: Group :: cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	36	0	36	100.00
Crosses	128	0	128	100.00

Variables for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_cg_cc	128	0	128	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	14611021	1			T26	75		T27	1211		T28	405
all_values[1]	14611021	1			T26	75		T27	1211		T28	405
all_values[2]	14611021	1			T26	75		T27	1211		T28	405
all_values[3]	14611021	1			T26	75		T27	1211		T28	405
all_values[4]	14611021	1			T26	75		T27	1211		T28	405
all_values[5]	14611021	1			T26	75		T27	1211		T28	405
all_values[6]	14611021	1			T26	75		T27	1211		T28	405
all_values[7]	14611021	1			T26	75		T27	1211		T28	405
all_values[8]	14611021	1			T26	75		T27	1211		T28	405
all_values[9]	14611021	1			T26	75		T27	1211		T28	405
all_values[10]	14611021	1			T26	75		T27	1211		T28	405
all_values[11]	14611021	1			T26	75		T27	1211		T28	405
all_values[12]	14611021	1			T26	75		T27	1211		T28	405
all_values[13]	14611021	1			T26	75		T27	1211		T28	405
all_values[14]	14611021	1			T26	75		T27	1211		T28	405
all_values[15]	14611021	1			T26	75		T27	1211		T28	405
all_values[16]	14611021	1			T26	75		T27	1211		T28	405
all_values[17]	14611021	1			T26	75		T27	1211		T28	405
all_values[18]	14611021	1			T26	75		T27	1211		T28	405
all_values[19]	14611021	1			T26	75		T27	1211		T28	405
all_values[20]	14611021	1			T26	75		T27	1211		T28	405
all_values[21]	14611021	1			T26	75		T27	1211		T28	405
all_values[22]	14611021	1			T26	75		T27	1211		T28	405
all_values[23]	14611021	1			T26	75		T27	1211		T28	405
all_values[24]	14611021	1			T26	75		T27	1211		T28	405
all_values[25]	14611021	1			T26	75		T27	1211		T28	405
all_values[26]	14611021	1			T26	75		T27	1211		T28	405
all_values[27]	14611021	1			T26	75		T27	1211		T28	405
all_values[28]	14611021	1			T26	75		T27	1211		T28	405
all_values[29]	14611021	1			T26	75		T27	1211		T28	405
all_values[30]	14611021	1			T26	75		T27	1211		T28	405
all_values[31]	14611021	1			T26	75		T27	1211		T28	405

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

267626322

1

T26

1529

T27

19935

T28

12960

auto[1]

199926350

1

T26

871

T27

18817

T30

578113

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

105958869

1

T26

1681

T27

5841

T28

12960

auto[1]

361593803

1

T26

719

T27

32911

T30

102898

---

Summary for Cross intr_cg_cc

Samples crossed: cp_intr cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for intr_cg_cc

Bins

cp_intr	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	2711880	1			T26	39		T27	79		T28	405
all_values[0]	auto[0]	auto[1]	5659172	1			T26	7		T27	456		T30	16238
all_values[0]	auto[1]	auto[0]	596267	1			T26	28		T27	76		T30	1911
all_values[0]	auto[1]	auto[1]	5643702	1			T26	1		T27	600		T30	16029
all_values[1]	auto[0]	auto[0]	2707453	1			T26	36		T27	106		T28	405
all_values[1]	auto[0]	auto[1]	5656747	1			T27	552		T30	15326		T34	1040
all_values[1]	auto[1]	auto[0]	601079	1			T26	10		T27	77		T30	1862
all_values[1]	auto[1]	auto[1]	5645742	1			T26	29		T27	476		T30	16049
all_values[2]	auto[0]	auto[0]	2711390	1			T26	41		T27	152		T28	405
all_values[2]	auto[0]	auto[1]	5667778	1			T26	10		T27	518		T30	15505
all_values[2]	auto[1]	auto[0]	615008	1			T26	22		T27	53		T30	1599
all_values[2]	auto[1]	auto[1]	5616845	1			T26	2		T27	488		T30	17314
all_values[3]	auto[0]	auto[0]	2712783	1			T26	39		T27	84		T28	405
all_values[3]	auto[0]	auto[1]	5635202	1			T26	20		T27	458		T30	16937
all_values[3]	auto[1]	auto[0]	607284	1			T26	10		T27	108		T30	1815
all_values[3]	auto[1]	auto[1]	5655752	1			T26	6		T27	561		T30	15505
all_values[4]	auto[0]	auto[0]	2707071	1			T26	32		T27	52		T28	405
all_values[4]	auto[0]	auto[1]	5629266	1			T26	15		T27	504		T30	15527
all_values[4]	auto[1]	auto[0]	606837	1			T26	18		T27	36		T30	1619
all_values[4]	auto[1]	auto[1]	5667847	1			T26	10		T27	619		T30	17069
all_values[5]	auto[0]	auto[0]	2710804	1			T26	37		T27	126		T28	405
all_values[5]	auto[0]	auto[1]	5620193	1			T26	13		T27	575		T30	15604
all_values[5]	auto[1]	auto[0]	601576	1			T26	3		T27	95		T30	1809
all_values[5]	auto[1]	auto[1]	5678448	1			T26	22		T27	415		T30	16522
all_values[6]	auto[0]	auto[0]	2700789	1			T26	44		T27	95		T28	405
all_values[6]	auto[0]	auto[1]	5663237	1			T26	6		T27	570		T30	17156
all_values[6]	auto[1]	auto[0]	598471	1			T26	16		T27	64		T30	2040
all_values[6]	auto[1]	auto[1]	5648524	1			T26	9		T27	482		T30	14858
all_values[7]	auto[0]	auto[0]	2716342	1			T26	51		T27	56		T28	405
all_values[7]	auto[0]	auto[1]	5704135	1			T26	15		T27	458		T30	16701
all_values[7]	auto[1]	auto[0]	598373	1			T26	5		T27	131		T30	1724
all_values[7]	auto[1]	auto[1]	5592171	1			T26	4		T27	566		T30	15757
all_values[8]	auto[0]	auto[0]	2709720	1			T26	31		T27	84		T28	405
all_values[8]	auto[0]	auto[1]	5643058	1			T26	9		T27	384		T30	16656
all_values[8]	auto[1]	auto[0]	602377	1			T26	8		T27	117		T30	1861
all_values[8]	auto[1]	auto[1]	5655866	1			T26	27		T27	626		T30	15598
all_values[9]	auto[0]	auto[0]	2710864	1			T26	36		T27	114		T28	405
all_values[9]	auto[0]	auto[1]	5662216	1			T26	17		T27	651		T30	16134
all_values[9]	auto[1]	auto[0]	607713	1			T26	13		T27	50		T30	1656
all_values[9]	auto[1]	auto[1]	5630228	1			T26	9		T27	396		T30	16182
all_values[10]	auto[0]	auto[0]	2702210	1			T26	38		T27	84		T28	405
all_values[10]	auto[0]	auto[1]	5678678	1			T26	15		T27	695		T30	16588
all_values[10]	auto[1]	auto[0]	599782	1			T26	17		T27	58		T30	1713
all_values[10]	auto[1]	auto[1]	5630351	1			T26	5		T27	374		T30	15917
all_values[11]	auto[0]	auto[0]	2703179	1			T26	37		T27	80		T28	405
all_values[11]	auto[0]	auto[1]	5677617	1			T26	3		T27	462		T30	16146
all_values[11]	auto[1]	auto[0]	606555	1			T26	26		T27	63		T30	1896
all_values[11]	auto[1]	auto[1]	5623670	1			T26	9		T27	606		T30	16082
all_values[12]	auto[0]	auto[0]	2711371	1			T26	42		T27	76		T28	405
all_values[12]	auto[0]	auto[1]	5609477	1			T26	12		T27	541		T30	15179
all_values[12]	auto[1]	auto[0]	601177	1			T26	11		T27	98		T30	1843
all_values[12]	auto[1]	auto[1]	5688996	1			T26	10		T27	496		T30	17184
all_values[13]	auto[0]	auto[0]	2708253	1			T26	37		T27	100		T28	405
all_values[13]	auto[0]	auto[1]	5637495	1			T26	2		T27	607		T30	16649
all_values[13]	auto[1]	auto[0]	610352	1			T26	5		T27	63		T30	2158
all_values[13]	auto[1]	auto[1]	5654921	1			T26	31		T27	441		T30	15294
all_values[14]	auto[0]	auto[0]	2709695	1			T26	32		T27	69		T28	405
all_values[14]	auto[0]	auto[1]	5659682	1			T26	19		T27	445		T30	15912
all_values[14]	auto[1]	auto[0]	612014	1			T26	18		T27	76		T30	2150
all_values[14]	auto[1]	auto[1]	5629630	1			T26	6		T27	621		T30	16047
all_values[15]	auto[0]	auto[0]	2696188	1			T26	31		T27	57		T28	405
all_values[15]	auto[0]	auto[1]	5672045	1			T26	18		T27	463		T30	15654
all_values[15]	auto[1]	auto[0]	598905	1			T26	18		T27	104		T30	2572
all_values[15]	auto[1]	auto[1]	5643883	1			T26	8		T27	587		T30	15748
all_values[16]	auto[0]	auto[0]	2697581	1			T26	38		T27	90		T28	405
all_values[16]	auto[0]	auto[1]	5637247	1			T26	5		T27	542		T30	15782
all_values[16]	auto[1]	auto[0]	599640	1			T26	16		T27	85		T30	1918
all_values[16]	auto[1]	auto[1]	5676553	1			T26	16		T27	494		T30	16480
all_values[17]	auto[0]	auto[0]	2715299	1			T26	26		T27	70		T28	405
all_values[17]	auto[0]	auto[1]	5653973	1			T27	682		T30	15876		T34	1266
all_values[17]	auto[1]	auto[0]	600735	1			T26	35		T27	65		T30	1955
all_values[17]	auto[1]	auto[1]	5641014	1			T26	14		T27	394		T30	16189
all_values[18]	auto[0]	auto[0]	2707508	1			T26	31		T27	91		T28	405
all_values[18]	auto[0]	auto[1]	5664686	1			T26	17		T27	600		T30	15768
all_values[18]	auto[1]	auto[0]	595916	1			T26	9		T27	43		T30	1761
all_values[18]	auto[1]	auto[1]	5642911	1			T26	18		T27	477		T30	16775
all_values[19]	auto[0]	auto[0]	2704307	1			T26	44		T27	91		T28	405
all_values[19]	auto[0]	auto[1]	5681734	1			T26	17		T27	590		T30	15176
all_values[19]	auto[1]	auto[0]	596626	1			T26	4		T27	97		T30	1947
all_values[19]	auto[1]	auto[1]	5628354	1			T26	10		T27	433		T30	17074
all_values[20]	auto[0]	auto[0]	2706638	1			T26	34		T27	117		T28	405
all_values[20]	auto[0]	auto[1]	5631826	1			T26	4		T27	452		T30	15642
all_values[20]	auto[1]	auto[0]	607009	1			T26	33		T27	88		T30	2384
all_values[20]	auto[1]	auto[1]	5665548	1			T26	4		T27	554		T30	16221
all_values[21]	auto[0]	auto[0]	2707141	1			T26	31		T27	60		T28	405
all_values[21]	auto[0]	auto[1]	5648602	1			T26	12		T27	580		T30	15354
all_values[21]	auto[1]	auto[0]	602079	1			T26	19		T27	94		T30	2206
all_values[21]	auto[1]	auto[1]	5653199	1			T26	13		T27	477		T30	16619
all_values[22]	auto[0]	auto[0]	2702388	1			T26	36		T27	131		T28	405
all_values[22]	auto[0]	auto[1]	5701071	1			T26	6		T27	446		T30	16679
all_values[22]	auto[1]	auto[0]	602507	1			T26	11		T27	92		T30	1755
all_values[22]	auto[1]	auto[1]	5605055	1			T26	22		T27	542		T30	15952
all_values[23]	auto[0]	auto[0]	2715642	1			T26	36		T27	178		T28	405
all_values[23]	auto[0]	auto[1]	5663903	1			T26	9		T27	439		T30	16556
all_values[23]	auto[1]	auto[0]	597727	1			T26	16		T27	113		T30	1944
all_values[23]	auto[1]	auto[1]	5633749	1			T26	14		T27	481		T30	15287
all_values[24]	auto[0]	auto[0]	2710431	1			T26	49		T27	129		T28	405
all_values[24]	auto[0]	auto[1]	5628432	1			T26	10		T27	626		T30	15976
all_values[24]	auto[1]	auto[0]	611995	1			T26	10		T27	52		T30	2891
all_values[24]	auto[1]	auto[1]	5660163	1			T26	6		T27	404		T30	15332
all_values[25]	auto[0]	auto[0]	2707867	1			T26	41		T27	69		T28	405
all_values[25]	auto[0]	auto[1]	5682599	1			T26	4		T27	465		T30	16174
all_values[25]	auto[1]	auto[0]	600313	1			T26	19		T27	126		T30	1766
all_values[25]	auto[1]	auto[1]	5620242	1			T26	11		T27	551		T30	16178
all_values[26]	auto[0]	auto[0]	2706690	1			T26	41		T27	100		T28	405
all_values[26]	auto[0]	auto[1]	5652576	1			T26	11		T27	449		T30	15714
all_values[26]	auto[1]	auto[0]	605186	1			T26	11		T27	100		T30	1764
all_values[26]	auto[1]	auto[1]	5646569	1			T26	12		T27	562		T30	16384
all_values[27]	auto[0]	auto[0]	2705022	1			T26	23		T27	207		T28	405
all_values[27]	auto[0]	auto[1]	5651996	1			T26	9		T27	550		T30	16793
all_values[27]	auto[1]	auto[0]	606490	1			T26	26		T27	72		T30	1880
all_values[27]	auto[1]	auto[1]	5647513	1			T26	17		T27	382		T30	15485
all_values[28]	auto[0]	auto[0]	2705175	1			T26	34		T27	82		T28	405
all_values[28]	auto[0]	auto[1]	5667229	1			T26	9		T27	530		T30	16037
all_values[28]	auto[1]	auto[0]	609026	1			T26	15		T27	92		T30	1826
all_values[28]	auto[1]	auto[1]	5629591	1			T26	17		T27	507		T30	16385
all_values[29]	auto[0]	auto[0]	2705460	1			T26	34		T27	150		T28	405
all_values[29]	auto[0]	auto[1]	5654890	1			T26	12		T27	483		T30	16170
all_values[29]	auto[1]	auto[0]	604590	1			T26	7		T27	95		T30	1736
all_values[29]	auto[1]	auto[1]	5646081	1			T26	22		T27	483		T30	16128
all_values[30]	auto[0]	auto[0]	2715880	1			T26	52		T27	112		T28	405
all_values[30]	auto[0]	auto[1]	5620027	1			T26	10		T27	567		T30	15114
all_values[30]	auto[1]	auto[0]	602007	1			T26	10		T27	50		T30	1887
all_values[30]	auto[1]	auto[1]	5673107	1			T26	3		T27	482		T30	16925
all_values[31]	auto[0]	auto[0]	2707956	1			T26	45		T27	106		T28	405
all_values[31]	auto[0]	auto[1]	5658556	1			T26	15		T27	398		T30	16137
all_values[31]	auto[1]	auto[0]	602276	1			T26	14		T27	111		T30	2139
all_values[31]	auto[1]	auto[1]	5642233	1			T26	1		T27	596		T30	15557