Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8347985 |
1 |
|
|
T26 |
59 |
|
T27 |
542 |
|
T28 |
405 |
auto[1] |
6263036 |
1 |
|
|
T26 |
16 |
|
T27 |
669 |
|
T30 |
17320 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13813827 |
1 |
|
|
T26 |
75 |
|
T27 |
1186 |
|
T28 |
405 |
auto[1] |
797194 |
1 |
|
|
T27 |
25 |
|
T30 |
2132 |
|
T34 |
208 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8359194 |
1 |
|
|
T26 |
62 |
|
T27 |
568 |
|
T28 |
405 |
auto[1] |
6251827 |
1 |
|
|
T26 |
13 |
|
T27 |
643 |
|
T30 |
18809 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
2721598 |
1 |
|
|
T26 |
7 |
|
T27 |
283 |
|
T30 |
8584 |
auto[1] |
auto[0] |
auto[1] |
396860 |
1 |
|
|
T27 |
8 |
|
T30 |
1127 |
|
T34 |
120 |
auto[1] |
auto[1] |
auto[0] |
2733035 |
1 |
|
|
T26 |
6 |
|
T27 |
335 |
|
T30 |
8093 |
auto[1] |
auto[1] |
auto[1] |
400334 |
1 |
|
|
T27 |
17 |
|
T30 |
1005 |
|
T34 |
88 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |