Unified Coverage Report :: Group :: cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	38	0	38	100.00
Crosses	192	0	192	100.00

Variables for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2
cp_intr_test	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_test_cg_cc	192	0	192	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	11709198	1			T21	680		T22	54560		T23	1683
all_values[1]	11709198	1			T21	680		T22	54560		T23	1683
all_values[2]	11709198	1			T21	680		T22	54560		T23	1683
all_values[3]	11709198	1			T21	680		T22	54560		T23	1683
all_values[4]	11709198	1			T21	680		T22	54560		T23	1683
all_values[5]	11709198	1			T21	680		T22	54560		T23	1683
all_values[6]	11709198	1			T21	680		T22	54560		T23	1683
all_values[7]	11709198	1			T21	680		T22	54560		T23	1683
all_values[8]	11709198	1			T21	680		T22	54560		T23	1683
all_values[9]	11709198	1			T21	680		T22	54560		T23	1683
all_values[10]	11709198	1			T21	680		T22	54560		T23	1683
all_values[11]	11709198	1			T21	680		T22	54560		T23	1683
all_values[12]	11709198	1			T21	680		T22	54560		T23	1683
all_values[13]	11709198	1			T21	680		T22	54560		T23	1683
all_values[14]	11709198	1			T21	680		T22	54560		T23	1683
all_values[15]	11709198	1			T21	680		T22	54560		T23	1683
all_values[16]	11709198	1			T21	680		T22	54560		T23	1683
all_values[17]	11709198	1			T21	680		T22	54560		T23	1683
all_values[18]	11709198	1			T21	680		T22	54560		T23	1683
all_values[19]	11709198	1			T21	680		T22	54560		T23	1683
all_values[20]	11709198	1			T21	680		T22	54560		T23	1683
all_values[21]	11709198	1			T21	680		T22	54560		T23	1683
all_values[22]	11709198	1			T21	680		T22	54560		T23	1683
all_values[23]	11709198	1			T21	680		T22	54560		T23	1683
all_values[24]	11709198	1			T21	680		T22	54560		T23	1683
all_values[25]	11709198	1			T21	680		T22	54560		T23	1683
all_values[26]	11709198	1			T21	680		T22	54560		T23	1683
all_values[27]	11709198	1			T21	680		T22	54560		T23	1683
all_values[28]	11709198	1			T21	680		T22	54560		T23	1683
all_values[29]	11709198	1			T21	680		T22	54560		T23	1683
all_values[30]	11709198	1			T21	680		T22	54560		T23	1683
all_values[31]	11709198	1			T21	680		T22	54560		T23	1683

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

221225105

1

T21

11244

T22

174592

T23

53856

auto[1]

153469231

1

T21

10516

T29

6000

T31

3960

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

96852564

1

T21

2416

T22

174592

T23

53856

auto[1]

277841772

1

T21

19344

T29

9692

T31

6279

---

Summary for Variable cp_intr_test

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_test

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

370755673

1

T21

21760

T22

174592

T23

53856

auto[1]

3938663

1

T32

11526

T33

32190

T1

674

---

Summary for Cross intr_test_cg_cc

Samples crossed: cp_intr cp_intr_test cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
TOTAL	192	0	192	100.00
Automatically Generated Cross Bins	192	0	192	100.00
User Defined Cross Bins	0	0	0

Automatically Generated Cross Bins for intr_test_cg_cc

Bins

cp_intr	cp_intr_test	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	auto[0]	2564652	1			T21	32		T22	54560		T23	1683
all_values[0]	auto[0]	auto[0]	auto[1]	4283591	1			T21	274		T29	153		T31	89
all_values[0]	auto[0]	auto[1]	auto[0]	459847	1			T21	57		T29	17		T31	18
all_values[0]	auto[0]	auto[1]	auto[1]	4277664	1			T21	317		T29	127		T31	119
all_values[0]	auto[1]	auto[0]	auto[1]	61867	1			T32	167		T33	522		T1	7
all_values[0]	auto[1]	auto[1]	auto[1]	61577	1			T32	170		T33	487		T1	10
all_values[1]	auto[0]	auto[0]	auto[0]	2573172	1			T21	54		T22	54560		T23	1683
all_values[1]	auto[0]	auto[0]	auto[1]	4307887	1			T21	383		T29	161		T31	107
all_values[1]	auto[0]	auto[1]	auto[0]	462269	1			T21	23		T29	26		T31	39
all_values[1]	auto[0]	auto[1]	auto[1]	4242667	1			T21	220		T29	143		T31	68
all_values[1]	auto[1]	auto[0]	auto[1]	61892	1			T32	218		T33	493		T1	6
all_values[1]	auto[1]	auto[1]	auto[1]	61311	1			T32	172		T33	497		T1	10
all_values[2]	auto[0]	auto[0]	auto[0]	2560562	1			T21	24		T22	54560		T23	1683
all_values[2]	auto[0]	auto[0]	auto[1]	4278154	1			T21	362		T29	133		T31	86
all_values[2]	auto[0]	auto[1]	auto[0]	466740	1			T21	34		T29	27		T31	20
all_values[2]	auto[0]	auto[1]	auto[1]	4280365	1			T21	260		T29	194		T31	115
all_values[2]	auto[1]	auto[0]	auto[1]	62115	1			T32	166		T33	499		T1	11
all_values[2]	auto[1]	auto[1]	auto[1]	61262	1			T32	198		T33	496		T1	12
all_values[3]	auto[0]	auto[0]	auto[0]	2556560	1			T21	17		T22	54560		T23	1683
all_values[3]	auto[0]	auto[0]	auto[1]	4307800	1			T21	207		T29	163		T31	105
all_values[3]	auto[0]	auto[1]	auto[0]	460309	1			T21	7		T29	18		T31	35
all_values[3]	auto[0]	auto[1]	auto[1]	4261838	1			T21	449		T29	154		T31	49
all_values[3]	auto[1]	auto[0]	auto[1]	61617	1			T32	197		T33	560		T1	11
all_values[3]	auto[1]	auto[1]	auto[1]	61074	1			T32	148		T33	496		T1	15
all_values[4]	auto[0]	auto[0]	auto[0]	2568733	1			T21	23		T22	54560		T23	1683
all_values[4]	auto[0]	auto[0]	auto[1]	4279980	1			T21	374		T29	186		T31	75
all_values[4]	auto[0]	auto[1]	auto[0]	458626	1			T21	14		T29	20		T31	4
all_values[4]	auto[0]	auto[1]	auto[1]	4278766	1			T21	269		T29	138		T31	116
all_values[4]	auto[1]	auto[0]	auto[1]	61629	1			T32	188		T33	488		T1	14
all_values[4]	auto[1]	auto[1]	auto[1]	61464	1			T32	171		T33	518		T1	9
all_values[5]	auto[0]	auto[0]	auto[0]	2563101	1			T21	46		T22	54560		T23	1683
all_values[5]	auto[0]	auto[0]	auto[1]	4279477	1			T21	268		T29	100		T31	145
all_values[5]	auto[0]	auto[1]	auto[0]	459996	1			T21	35		T29	64		T31	8
all_values[5]	auto[0]	auto[1]	auto[1]	4283610	1			T21	331		T29	180		T31	73
all_values[5]	auto[1]	auto[0]	auto[1]	61241	1			T32	177		T33	467		T1	13
all_values[5]	auto[1]	auto[1]	auto[1]	61773	1			T32	175		T33	554		T1	7
all_values[6]	auto[0]	auto[0]	auto[0]	2562624	1			T21	55		T22	54560		T23	1683
all_values[6]	auto[0]	auto[0]	auto[1]	4267537	1			T21	183		T29	184		T31	76
all_values[6]	auto[0]	auto[1]	auto[0]	465808	1			T21	64		T29	23		T31	19
all_values[6]	auto[0]	auto[1]	auto[1]	4290222	1			T21	378		T29	144		T31	124
all_values[6]	auto[1]	auto[0]	auto[1]	61556	1			T32	171		T33	549		T1	13
all_values[6]	auto[1]	auto[1]	auto[1]	61451	1			T32	179		T33	497		T1	7
all_values[7]	auto[0]	auto[0]	auto[0]	2563806	1			T21	88		T22	54560		T23	1683
all_values[7]	auto[0]	auto[0]	auto[1]	4284051	1			T21	382		T29	131		T31	114
all_values[7]	auto[0]	auto[1]	auto[0]	457300	1			T21	5		T29	36		T31	22
all_values[7]	auto[0]	auto[1]	auto[1]	4280805	1			T21	205		T29	191		T31	98
all_values[7]	auto[1]	auto[0]	auto[1]	61700	1			T32	224		T33	517		T1	8
all_values[7]	auto[1]	auto[1]	auto[1]	61536	1			T32	143		T33	502		T1	14
all_values[8]	auto[0]	auto[0]	auto[0]	2568536	1			T21	21		T22	54560		T23	1683
all_values[8]	auto[0]	auto[0]	auto[1]	4298987	1			T21	374		T29	169		T31	89
all_values[8]	auto[0]	auto[1]	auto[0]	461162	1			T21	47		T29	43		T31	12
all_values[8]	auto[0]	auto[1]	auto[1]	4257310	1			T21	238		T29	128		T31	132
all_values[8]	auto[1]	auto[0]	auto[1]	61799	1			T32	172		T33	571		T1	6
all_values[8]	auto[1]	auto[1]	auto[1]	61404	1			T32	188		T33	487		T1	11
all_values[9]	auto[0]	auto[0]	auto[0]	2568304	1			T21	48		T22	54560		T23	1683
all_values[9]	auto[0]	auto[0]	auto[1]	4266584	1			T21	259		T29	163		T31	94
all_values[9]	auto[0]	auto[1]	auto[0]	465085	1			T21	30		T29	19		T31	15
all_values[9]	auto[0]	auto[1]	auto[1]	4285844	1			T21	343		T29	137		T31	97
all_values[9]	auto[1]	auto[0]	auto[1]	62290	1			T32	189		T33	480		T1	6
all_values[9]	auto[1]	auto[1]	auto[1]	61091	1			T32	165		T33	488		T1	18
all_values[10]	auto[0]	auto[0]	auto[0]	2568208	1			T21	22		T22	54560		T23	1683
all_values[10]	auto[0]	auto[0]	auto[1]	4298048	1			T21	427		T29	126		T31	95
all_values[10]	auto[0]	auto[1]	auto[0]	468307	1			T21	34		T29	65		T31	33
all_values[10]	auto[0]	auto[1]	auto[1]	4251981	1			T21	197		T29	132		T31	39
all_values[10]	auto[1]	auto[0]	auto[1]	61010	1			T32	162		T33	513		T1	7
all_values[10]	auto[1]	auto[1]	auto[1]	61644	1			T32	184		T33	483		T1	20
all_values[11]	auto[0]	auto[0]	auto[0]	2566745	1			T21	67		T22	54560		T23	1683
all_values[11]	auto[0]	auto[0]	auto[1]	4260755	1			T21	193		T29	192		T31	97
all_values[11]	auto[0]	auto[1]	auto[0]	460609	1			T21	46		T29	23		T31	11
all_values[11]	auto[0]	auto[1]	auto[1]	4297466	1			T21	374		T29	91		T31	109
all_values[11]	auto[1]	auto[0]	auto[1]	61604	1			T32	185		T33	487		T1	13
all_values[11]	auto[1]	auto[1]	auto[1]	62019	1			T32	200		T33	531		T1	9
all_values[12]	auto[0]	auto[0]	auto[0]	2565620	1			T21	58		T22	54560		T23	1683
all_values[12]	auto[0]	auto[0]	auto[1]	4276514	1			T21	461		T29	142		T31	107
all_values[12]	auto[0]	auto[1]	auto[0]	460365	1			T21	9		T29	68		T31	2
all_values[12]	auto[0]	auto[1]	auto[1]	4283466	1			T21	152		T29	124		T31	119
all_values[12]	auto[1]	auto[0]	auto[1]	62310	1			T32	196		T33	473		T1	11
all_values[12]	auto[1]	auto[1]	auto[1]	60923	1			T32	175		T33	524		T1	14
all_values[13]	auto[0]	auto[0]	auto[0]	2562624	1			T21	44		T22	54560		T23	1683
all_values[13]	auto[0]	auto[0]	auto[1]	4272216	1			T21	296		T29	125		T31	57
all_values[13]	auto[0]	auto[1]	auto[0]	462985	1			T21	28		T29	63		T31	32
all_values[13]	auto[0]	auto[1]	auto[1]	4288077	1			T21	312		T29	140		T31	137
all_values[13]	auto[1]	auto[0]	auto[1]	61715	1			T32	169		T33	505		T1	10
all_values[13]	auto[1]	auto[1]	auto[1]	61581	1			T32	201		T33	461		T1	9
all_values[14]	auto[0]	auto[0]	auto[0]	2566281	1			T21	25		T22	54560		T23	1683
all_values[14]	auto[0]	auto[0]	auto[1]	4278981	1			T21	304		T29	116		T31	73
all_values[14]	auto[0]	auto[1]	auto[0]	452388	1			T21	47		T29	51		T31	31
all_values[14]	auto[0]	auto[1]	auto[1]	4288258	1			T21	304		T29	172		T31	110
all_values[14]	auto[1]	auto[0]	auto[1]	61755	1			T32	187		T33	512		T1	8
all_values[14]	auto[1]	auto[1]	auto[1]	61535	1			T32	181		T33	491		T1	10
all_values[15]	auto[0]	auto[0]	auto[0]	2563901	1			T21	62		T22	54560		T23	1683
all_values[15]	auto[0]	auto[0]	auto[1]	4291171	1			T21	301		T29	168		T31	91
all_values[15]	auto[0]	auto[1]	auto[0]	452947	1			T21	23		T29	50		T31	41
all_values[15]	auto[0]	auto[1]	auto[1]	4278771	1			T21	294		T29	137		T31	94
all_values[15]	auto[1]	auto[0]	auto[1]	61425	1			T32	181		T33	487		T1	9
all_values[15]	auto[1]	auto[1]	auto[1]	60983	1			T32	178		T33	523		T1	17
all_values[16]	auto[0]	auto[0]	auto[0]	2569281	1			T21	84		T22	54560		T23	1683
all_values[16]	auto[0]	auto[0]	auto[1]	4257820	1			T21	282		T29	129		T31	120
all_values[16]	auto[0]	auto[1]	auto[0]	461594	1			T21	47		T29	15		T31	24
all_values[16]	auto[0]	auto[1]	auto[1]	4297328	1			T21	267		T29	204		T31	76
all_values[16]	auto[1]	auto[0]	auto[1]	61566	1			T32	156		T33	478		T1	19
all_values[16]	auto[1]	auto[1]	auto[1]	61609	1			T32	208		T33	500		T1	3
all_values[17]	auto[0]	auto[0]	auto[0]	2562577	1			T21	58		T22	54560		T23	1683
all_values[17]	auto[0]	auto[0]	auto[1]	4302420	1			T21	404		T29	167		T31	99
all_values[17]	auto[0]	auto[1]	auto[0]	467704	1			T21	17		T29	20		T31	33
all_values[17]	auto[0]	auto[1]	auto[1]	4253499	1			T21	201		T29	165		T31	77
all_values[17]	auto[1]	auto[0]	auto[1]	62164	1			T32	161		T33	497		T1	5
all_values[17]	auto[1]	auto[1]	auto[1]	60834	1			T32	186		T33	484		T1	7
all_values[18]	auto[0]	auto[0]	auto[0]	2570257	1			T21	27		T22	54560		T23	1683
all_values[18]	auto[0]	auto[0]	auto[1]	4281976	1			T21	318		T29	204		T31	92
all_values[18]	auto[0]	auto[1]	auto[0]	455613	1			T21	11		T29	11		T31	12
all_values[18]	auto[0]	auto[1]	auto[1]	4278410	1			T21	324		T29	128		T31	108
all_values[18]	auto[1]	auto[0]	auto[1]	61925	1			T32	210		T33	489		T1	11
all_values[18]	auto[1]	auto[1]	auto[1]	61017	1			T32	174		T33	536		T1	12
all_values[19]	auto[0]	auto[0]	auto[0]	2560737	1			T21	24		T22	54560		T23	1683
all_values[19]	auto[0]	auto[0]	auto[1]	4294808	1			T21	450		T29	211		T31	112
all_values[19]	auto[0]	auto[1]	auto[0]	471860	1			T21	19		T29	20		T31	6
all_values[19]	auto[0]	auto[1]	auto[1]	4259180	1			T21	187		T29	121		T31	103
all_values[19]	auto[1]	auto[0]	auto[1]	61585	1			T32	155		T33	538		T1	5
all_values[19]	auto[1]	auto[1]	auto[1]	61028	1			T32	196		T33	511		T1	12
all_values[20]	auto[0]	auto[0]	auto[0]	2562992	1			T21	63		T22	54560		T23	1683
all_values[20]	auto[0]	auto[0]	auto[1]	4298576	1			T21	215		T29	109		T31	72
all_values[20]	auto[0]	auto[1]	auto[0]	466349	1			T21	44		T29	59		T31	11
all_values[20]	auto[0]	auto[1]	auto[1]	4258327	1			T21	358		T29	175		T31	112
all_values[20]	auto[1]	auto[0]	auto[1]	61570	1			T32	176		T33	470		T1	10
all_values[20]	auto[1]	auto[1]	auto[1]	61384	1			T32	157		T33	527		T1	10
all_values[21]	auto[0]	auto[0]	auto[0]	2565017	1			T21	40		T22	54560		T23	1683
all_values[21]	auto[0]	auto[0]	auto[1]	4264998	1			T21	309		T29	190		T31	131
all_values[21]	auto[0]	auto[1]	auto[0]	462680	1			T21	52		T29	38		T31	5
all_values[21]	auto[0]	auto[1]	auto[1]	4293372	1			T21	279		T29	132		T31	79
all_values[21]	auto[1]	auto[0]	auto[1]	61841	1			T32	183		T33	517		T1	10
all_values[21]	auto[1]	auto[1]	auto[1]	61290	1			T32	187		T33	484		T1	14
all_values[22]	auto[0]	auto[0]	auto[0]	2561579	1			T21	16		T22	54560		T23	1683
all_values[22]	auto[0]	auto[0]	auto[1]	4284309	1			T21	192		T29	130		T31	90
all_values[22]	auto[0]	auto[1]	auto[0]	463208	1			T21	46		T29	18		T31	15
all_values[22]	auto[0]	auto[1]	auto[1]	4277601	1			T21	426		T29	201		T31	119
all_values[22]	auto[1]	auto[0]	auto[1]	61616	1			T32	180		T33	512		T1	12
all_values[22]	auto[1]	auto[1]	auto[1]	60885	1			T32	186		T33	486		T1	11
all_values[23]	auto[0]	auto[0]	auto[0]	2565943	1			T21	45		T22	54560		T23	1683
all_values[23]	auto[0]	auto[0]	auto[1]	4284288	1			T21	242		T29	132		T31	92
all_values[23]	auto[0]	auto[1]	auto[0]	459451	1			T21	75		T29	36		T31	14
all_values[23]	auto[0]	auto[1]	auto[1]	4276232	1			T21	318		T29	177		T31	126
all_values[23]	auto[1]	auto[0]	auto[1]	61930	1			T32	192		T33	520		T1	11
all_values[23]	auto[1]	auto[1]	auto[1]	61354	1			T32	155		T33	496		T1	10
all_values[24]	auto[0]	auto[0]	auto[0]	2568317	1			T21	39		T22	54560		T23	1683
all_values[24]	auto[0]	auto[0]	auto[1]	4303995	1			T21	322		T29	91		T31	113
all_values[24]	auto[0]	auto[1]	auto[0]	455372	1			T21	27		T29	37		T31	27
all_values[24]	auto[0]	auto[1]	auto[1]	4258152	1			T21	292		T29	219		T31	69
all_values[24]	auto[1]	auto[0]	auto[1]	61987	1			T32	181		T33	523		T1	13
all_values[24]	auto[1]	auto[1]	auto[1]	61375	1			T32	179		T33	494		T1	5
all_values[25]	auto[0]	auto[0]	auto[0]	2565647	1			T21	68		T22	54560		T23	1683
all_values[25]	auto[0]	auto[0]	auto[1]	4300300	1			T21	353		T29	94		T31	90
all_values[25]	auto[0]	auto[1]	auto[0]	458403	1			T21	17		T29	49		T31	40
all_values[25]	auto[0]	auto[1]	auto[1]	4261937	1			T21	242		T29	194		T31	108
all_values[25]	auto[1]	auto[0]	auto[1]	61460	1			T32	183		T33	514		T1	4
all_values[25]	auto[1]	auto[1]	auto[1]	61451	1			T32	196		T33	517		T1	11
all_values[26]	auto[0]	auto[0]	auto[0]	2565313	1			T21	19		T22	54560		T23	1683
all_values[26]	auto[0]	auto[0]	auto[1]	4323144	1			T21	329		T29	194		T31	94
all_values[26]	auto[0]	auto[1]	auto[0]	460316	1			T21	51		T29	41		T31	11
all_values[26]	auto[0]	auto[1]	auto[1]	4237420	1			T21	281		T29	92		T31	119
all_values[26]	auto[1]	auto[0]	auto[1]	62018	1			T32	168		T33	482		T1	11
all_values[26]	auto[1]	auto[1]	auto[1]	60987	1			T32	205		T33	502		T1	6
all_values[27]	auto[0]	auto[0]	auto[0]	2567360	1			T21	10		T22	54560		T23	1683
all_values[27]	auto[0]	auto[0]	auto[1]	4251862	1			T21	406		T29	157		T31	87
all_values[27]	auto[0]	auto[1]	auto[0]	465972	1			T21	26		T29	40		T31	18
all_values[27]	auto[0]	auto[1]	auto[1]	4300724	1			T21	238		T29	127		T31	106
all_values[27]	auto[1]	auto[0]	auto[1]	62021	1			T32	198		T33	491		T1	17
all_values[27]	auto[1]	auto[1]	auto[1]	61259	1			T32	174		T33	548		T1	2
all_values[28]	auto[0]	auto[0]	auto[0]	2558670	1			T21	33		T22	54560		T23	1683
all_values[28]	auto[0]	auto[0]	auto[1]	4275680	1			T21	191		T29	145		T31	71
all_values[28]	auto[0]	auto[1]	auto[0]	465962	1			T21	64		T29	33		T31	28
all_values[28]	auto[0]	auto[1]	auto[1]	4285583	1			T21	392		T29	136		T31	126
all_values[28]	auto[1]	auto[0]	auto[1]	61755	1			T32	202		T33	487		T1	19
all_values[28]	auto[1]	auto[1]	auto[1]	61548	1			T32	154		T33	510		T1	5
all_values[29]	auto[0]	auto[0]	auto[0]	2565873	1			T21	25		T22	54560		T23	1683
all_values[29]	auto[0]	auto[0]	auto[1]	4320678	1			T21	355		T29	167		T31	105
all_values[29]	auto[0]	auto[1]	auto[0]	462528	1			T21	4		T29	24		T31	31
all_values[29]	auto[0]	auto[1]	auto[1]	4236727	1			T21	296		T29	138		T31	98
all_values[29]	auto[1]	auto[0]	auto[1]	61890	1			T32	174		T33	501		T1	14
all_values[29]	auto[1]	auto[1]	auto[1]	61502	1			T32	177		T33	476		T1	7
all_values[30]	auto[0]	auto[0]	auto[0]	2563068	1			T21	62		T22	54560		T23	1683
all_values[30]	auto[0]	auto[0]	auto[1]	4289366	1			T21	304		T29	134		T31	96
all_values[30]	auto[0]	auto[1]	auto[0]	457075	1			T21	48		T29	11		T31	22
all_values[30]	auto[0]	auto[1]	auto[1]	4276703	1			T21	266		T29	180		T31	116
all_values[30]	auto[1]	auto[0]	auto[1]	62234	1			T32	179		T33	497		T1	12
all_values[30]	auto[1]	auto[1]	auto[1]	60752	1			T32	157		T33	490		T1	11
all_values[31]	auto[0]	auto[0]	auto[0]	2572071	1			T21	40		T22	54560		T23	1683
all_values[31]	auto[0]	auto[0]	auto[1]	4294020	1			T21	185		T29	121		T31	39
all_values[31]	auto[0]	auto[1]	auto[0]	455603	1			T21	26		T29	30		T31	45
all_values[31]	auto[0]	auto[1]	auto[1]	4264831	1			T21	429		T29	184		T31	135
all_values[31]	auto[1]	auto[0]	auto[1]	61914	1			T32	181		T33	494		T1	20
all_values[31]	auto[1]	auto[1]	auto[1]	60759	1			T32	179		T33	461		T1	10

User Defined Cross Bins for intr_test_cg_cc

Excluded/Illegal bins

NAME	COUNT	STATUS
test_1_state_0	0	Illegal