Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6909557 |
1 |
|
|
T21 |
470 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
4799641 |
1 |
|
|
T21 |
210 |
|
T29 |
227 |
|
T31 |
120 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11094321 |
1 |
|
|
T21 |
623 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
614877 |
1 |
|
|
T21 |
57 |
|
T29 |
9 |
|
T31 |
9 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6939084 |
1 |
|
|
T21 |
366 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
4770114 |
1 |
|
|
T21 |
314 |
|
T29 |
205 |
|
T31 |
142 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2088118 |
1 |
|
|
T21 |
167 |
|
T29 |
67 |
|
T31 |
75 |
| auto[1] |
auto[0] |
auto[1] |
309298 |
1 |
|
|
T21 |
39 |
|
T29 |
4 |
|
T31 |
5 |
| auto[1] |
auto[1] |
auto[0] |
2067119 |
1 |
|
|
T21 |
90 |
|
T29 |
129 |
|
T31 |
58 |
| auto[1] |
auto[1] |
auto[1] |
305579 |
1 |
|
|
T21 |
18 |
|
T29 |
5 |
|
T31 |
4 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |