Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6897178 |
1 |
|
|
T21 |
307 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
4812020 |
1 |
|
|
T21 |
373 |
|
T29 |
156 |
|
T31 |
112 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11091496 |
1 |
|
|
T21 |
623 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
617702 |
1 |
|
|
T21 |
57 |
|
T29 |
7 |
|
T31 |
5 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6922764 |
1 |
|
|
T21 |
380 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
4786434 |
1 |
|
|
T21 |
300 |
|
T29 |
156 |
|
T31 |
124 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2077542 |
1 |
|
|
T21 |
158 |
|
T29 |
70 |
|
T31 |
69 |
| auto[1] |
auto[0] |
auto[1] |
308042 |
1 |
|
|
T21 |
38 |
|
T29 |
2 |
|
T31 |
1 |
| auto[1] |
auto[1] |
auto[0] |
2091190 |
1 |
|
|
T21 |
85 |
|
T29 |
79 |
|
T31 |
50 |
| auto[1] |
auto[1] |
auto[1] |
309660 |
1 |
|
|
T21 |
19 |
|
T29 |
5 |
|
T31 |
4 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |