Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6910110 |
1 |
|
|
T21 |
306 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
4799088 |
1 |
|
|
T21 |
374 |
|
T29 |
144 |
|
T31 |
137 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9721497 |
1 |
|
|
T21 |
539 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
1987701 |
1 |
|
|
T21 |
141 |
|
T29 |
106 |
|
T31 |
52 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6894238 |
1 |
|
|
T21 |
446 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
4814960 |
1 |
|
|
T21 |
234 |
|
T29 |
187 |
|
T31 |
87 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1414305 |
1 |
|
|
T21 |
49 |
|
T29 |
49 |
|
T31 |
22 |
| auto[1] |
auto[0] |
auto[1] |
991156 |
1 |
|
|
T21 |
68 |
|
T29 |
61 |
|
T31 |
20 |
| auto[1] |
auto[1] |
auto[0] |
1412954 |
1 |
|
|
T21 |
44 |
|
T29 |
32 |
|
T31 |
13 |
| auto[1] |
auto[1] |
auto[1] |
996545 |
1 |
|
|
T21 |
73 |
|
T29 |
45 |
|
T31 |
32 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |