Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6927266 |
1 |
|
|
T21 |
449 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
4781932 |
1 |
|
|
T21 |
231 |
|
T29 |
197 |
|
T31 |
72 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9723857 |
1 |
|
|
T21 |
442 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
1985341 |
1 |
|
|
T21 |
238 |
|
T29 |
97 |
|
T31 |
45 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6919576 |
1 |
|
|
T21 |
192 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
4789622 |
1 |
|
|
T21 |
488 |
|
T29 |
163 |
|
T31 |
89 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1407126 |
1 |
|
|
T21 |
164 |
|
T29 |
23 |
|
T31 |
32 |
| auto[1] |
auto[0] |
auto[1] |
992188 |
1 |
|
|
T21 |
176 |
|
T29 |
23 |
|
T31 |
22 |
| auto[1] |
auto[1] |
auto[0] |
1397155 |
1 |
|
|
T21 |
86 |
|
T29 |
43 |
|
T31 |
12 |
| auto[1] |
auto[1] |
auto[1] |
993153 |
1 |
|
|
T21 |
62 |
|
T29 |
74 |
|
T31 |
23 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |