Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6918688 |
1 |
|
|
T21 |
405 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
4790510 |
1 |
|
|
T21 |
275 |
|
T29 |
168 |
|
T31 |
148 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2093097 |
1 |
|
|
T21 |
151 |
|
T29 |
98 |
|
T31 |
63 |
| auto[1] |
auto[0] |
auto[1] |
310542 |
1 |
|
|
T21 |
30 |
|
T29 |
8 |
|
T31 |
8 |
| auto[1] |
auto[1] |
auto[0] |
2081026 |
1 |
|
|
T21 |
75 |
|
T29 |
59 |
|
T31 |
71 |
| auto[1] |
auto[1] |
auto[1] |
305845 |
1 |
|
|
T21 |
19 |
|
T29 |
3 |
|
T31 |
6 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |