Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6907017 |
1 |
|
|
T21 |
329 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
4802181 |
1 |
|
|
T21 |
351 |
|
T29 |
223 |
|
T31 |
141 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9713086 |
1 |
|
|
T21 |
459 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
1996112 |
1 |
|
|
T21 |
221 |
|
T29 |
77 |
|
T31 |
69 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6890921 |
1 |
|
|
T21 |
280 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
4818277 |
1 |
|
|
T21 |
400 |
|
T29 |
135 |
|
T31 |
93 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1410414 |
1 |
|
|
T21 |
101 |
|
T29 |
20 |
|
T31 |
7 |
| auto[1] |
auto[0] |
auto[1] |
997482 |
1 |
|
|
T21 |
131 |
|
T29 |
27 |
|
T31 |
19 |
| auto[1] |
auto[1] |
auto[0] |
1411751 |
1 |
|
|
T21 |
78 |
|
T29 |
38 |
|
T31 |
17 |
| auto[1] |
auto[1] |
auto[1] |
998630 |
1 |
|
|
T21 |
90 |
|
T29 |
50 |
|
T31 |
50 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |