Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6881243 |
1 |
|
|
T21 |
416 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
4827955 |
1 |
|
|
T21 |
264 |
|
T29 |
167 |
|
T31 |
124 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11095341 |
1 |
|
|
T21 |
641 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
613857 |
1 |
|
|
T21 |
39 |
|
T29 |
7 |
|
T31 |
9 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6947251 |
1 |
|
|
T21 |
432 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
4761947 |
1 |
|
|
T21 |
248 |
|
T29 |
195 |
|
T31 |
113 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2061873 |
1 |
|
|
T21 |
120 |
|
T29 |
98 |
|
T31 |
58 |
| auto[1] |
auto[0] |
auto[1] |
303933 |
1 |
|
|
T21 |
22 |
|
T29 |
5 |
|
T31 |
5 |
| auto[1] |
auto[1] |
auto[0] |
2086217 |
1 |
|
|
T21 |
89 |
|
T29 |
90 |
|
T31 |
46 |
| auto[1] |
auto[1] |
auto[1] |
309924 |
1 |
|
|
T21 |
17 |
|
T29 |
2 |
|
T31 |
4 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |