Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6907504 |
1 |
|
|
T21 |
208 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
4801694 |
1 |
|
|
T21 |
472 |
|
T29 |
219 |
|
T31 |
134 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9724158 |
1 |
|
|
T21 |
539 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
1985040 |
1 |
|
|
T21 |
141 |
|
T29 |
91 |
|
T31 |
53 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6911361 |
1 |
|
|
T21 |
370 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
4797837 |
1 |
|
|
T21 |
310 |
|
T29 |
162 |
|
T31 |
120 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1409575 |
1 |
|
|
T21 |
51 |
|
T29 |
32 |
|
T31 |
21 |
| auto[1] |
auto[0] |
auto[1] |
997435 |
1 |
|
|
T21 |
36 |
|
T29 |
35 |
|
T31 |
9 |
| auto[1] |
auto[1] |
auto[0] |
1403222 |
1 |
|
|
T21 |
118 |
|
T29 |
39 |
|
T31 |
46 |
| auto[1] |
auto[1] |
auto[1] |
987605 |
1 |
|
|
T21 |
105 |
|
T29 |
56 |
|
T31 |
44 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |