Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6912161 |
1 |
|
|
T21 |
287 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
4797037 |
1 |
|
|
T21 |
393 |
|
T29 |
213 |
|
T31 |
140 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9731209 |
1 |
|
|
T21 |
557 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
1977989 |
1 |
|
|
T21 |
123 |
|
T29 |
74 |
|
T31 |
55 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6933506 |
1 |
|
|
T21 |
446 |
|
T22 |
54560 |
|
T23 |
1683 |
| auto[1] |
4775692 |
1 |
|
|
T21 |
234 |
|
T29 |
197 |
|
T31 |
134 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1399968 |
1 |
|
|
T21 |
52 |
|
T29 |
43 |
|
T31 |
28 |
| auto[1] |
auto[0] |
auto[1] |
992050 |
1 |
|
|
T21 |
50 |
|
T29 |
38 |
|
T31 |
31 |
| auto[1] |
auto[1] |
auto[0] |
1397735 |
1 |
|
|
T21 |
59 |
|
T29 |
80 |
|
T31 |
51 |
| auto[1] |
auto[1] |
auto[1] |
985939 |
1 |
|
|
T21 |
73 |
|
T29 |
36 |
|
T31 |
24 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |