cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54630 |
1 |
|
|
T22 |
1661 |
|
T97 |
334 |
|
T98 |
1917 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41050 |
1 |
|
|
T22 |
1473 |
|
T97 |
115 |
|
T98 |
1149 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51993 |
1 |
|
|
T22 |
1709 |
|
T97 |
639 |
|
T98 |
1453 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42093 |
1 |
|
|
T22 |
2550 |
|
T97 |
197 |
|
T98 |
2191 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T22 |
20 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T22 |
57 |
|
T97 |
7 |
|
T98 |
59 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T22 |
19 |
|
T97 |
2 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T22 |
59 |
|
T97 |
11 |
|
T98 |
60 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T22 |
20 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T22 |
56 |
|
T97 |
7 |
|
T98 |
57 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T22 |
19 |
|
T97 |
2 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T22 |
59 |
|
T97 |
11 |
|
T98 |
58 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T22 |
20 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T22 |
54 |
|
T97 |
7 |
|
T98 |
56 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T22 |
19 |
|
T97 |
2 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T22 |
59 |
|
T97 |
11 |
|
T98 |
56 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T22 |
20 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T22 |
51 |
|
T97 |
7 |
|
T98 |
55 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T22 |
19 |
|
T97 |
2 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T22 |
56 |
|
T97 |
11 |
|
T98 |
54 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T22 |
20 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T22 |
51 |
|
T97 |
7 |
|
T98 |
55 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T22 |
19 |
|
T97 |
2 |
|
T98 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T22 |
55 |
|
T97 |
11 |
|
T98 |
54 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T22 |
20 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T22 |
51 |
|
T97 |
7 |
|
T98 |
55 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T22 |
19 |
|
T97 |
2 |
|
T98 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T22 |
55 |
|
T97 |
10 |
|
T98 |
53 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T22 |
20 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T22 |
51 |
|
T97 |
7 |
|
T98 |
55 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T22 |
19 |
|
T97 |
2 |
|
T98 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T22 |
53 |
|
T97 |
10 |
|
T98 |
50 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T22 |
20 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T22 |
51 |
|
T97 |
7 |
|
T98 |
54 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T22 |
19 |
|
T97 |
2 |
|
T98 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T22 |
49 |
|
T97 |
10 |
|
T98 |
50 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T22 |
20 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T22 |
50 |
|
T97 |
6 |
|
T98 |
53 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T22 |
18 |
|
T97 |
2 |
|
T98 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T22 |
47 |
|
T97 |
10 |
|
T98 |
45 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T22 |
20 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T22 |
49 |
|
T97 |
5 |
|
T98 |
52 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T22 |
18 |
|
T97 |
2 |
|
T98 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T22 |
46 |
|
T97 |
10 |
|
T98 |
45 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T22 |
20 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T22 |
47 |
|
T97 |
5 |
|
T98 |
52 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T22 |
18 |
|
T97 |
2 |
|
T98 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T22 |
45 |
|
T97 |
10 |
|
T98 |
43 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T22 |
20 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T22 |
45 |
|
T97 |
4 |
|
T98 |
47 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T22 |
18 |
|
T97 |
2 |
|
T98 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1162 |
1 |
|
|
T22 |
43 |
|
T97 |
10 |
|
T98 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T22 |
20 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1183 |
1 |
|
|
T22 |
43 |
|
T97 |
4 |
|
T98 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T22 |
18 |
|
T97 |
2 |
|
T98 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1141 |
1 |
|
|
T22 |
42 |
|
T97 |
10 |
|
T98 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T22 |
20 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1157 |
1 |
|
|
T22 |
42 |
|
T97 |
4 |
|
T98 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T22 |
18 |
|
T97 |
2 |
|
T98 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1110 |
1 |
|
|
T22 |
42 |
|
T97 |
10 |
|
T98 |
40 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T22 |
20 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1134 |
1 |
|
|
T22 |
42 |
|
T97 |
4 |
|
T98 |
45 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T22 |
18 |
|
T97 |
2 |
|
T98 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1082 |
1 |
|
|
T22 |
42 |
|
T97 |
10 |
|
T98 |
38 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56121 |
1 |
|
|
T22 |
3003 |
|
T97 |
869 |
|
T98 |
1566 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41633 |
1 |
|
|
T22 |
1250 |
|
T97 |
144 |
|
T98 |
1320 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52801 |
1 |
|
|
T22 |
1681 |
|
T97 |
222 |
|
T98 |
1514 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40462 |
1 |
|
|
T22 |
1215 |
|
T97 |
181 |
|
T98 |
2274 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T22 |
31 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T22 |
50 |
|
T97 |
5 |
|
T98 |
61 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T22 |
33 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T22 |
48 |
|
T97 |
6 |
|
T98 |
68 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T22 |
31 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T22 |
50 |
|
T97 |
5 |
|
T98 |
60 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T22 |
33 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T22 |
48 |
|
T97 |
6 |
|
T98 |
63 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T22 |
31 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T22 |
50 |
|
T97 |
5 |
|
T98 |
60 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T22 |
33 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T22 |
47 |
|
T97 |
6 |
|
T98 |
62 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T22 |
31 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T22 |
49 |
|
T97 |
5 |
|
T98 |
57 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T22 |
33 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T22 |
45 |
|
T97 |
6 |
|
T98 |
61 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T22 |
31 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T22 |
49 |
|
T97 |
4 |
|
T98 |
56 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T22 |
33 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T22 |
45 |
|
T97 |
6 |
|
T98 |
60 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T22 |
31 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T22 |
49 |
|
T97 |
4 |
|
T98 |
56 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T22 |
33 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T22 |
43 |
|
T97 |
6 |
|
T98 |
57 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T22 |
31 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T22 |
49 |
|
T97 |
4 |
|
T98 |
54 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T22 |
33 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T22 |
43 |
|
T97 |
6 |
|
T98 |
55 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T22 |
31 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T22 |
48 |
|
T97 |
4 |
|
T98 |
53 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T22 |
33 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T22 |
43 |
|
T97 |
6 |
|
T98 |
52 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T22 |
31 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T22 |
48 |
|
T97 |
4 |
|
T98 |
51 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T22 |
32 |
|
T97 |
2 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T22 |
43 |
|
T97 |
6 |
|
T98 |
51 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T22 |
31 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T22 |
47 |
|
T97 |
2 |
|
T98 |
50 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T22 |
32 |
|
T97 |
2 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T22 |
43 |
|
T97 |
6 |
|
T98 |
51 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T22 |
31 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T22 |
45 |
|
T97 |
2 |
|
T98 |
48 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T22 |
32 |
|
T97 |
2 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T22 |
43 |
|
T97 |
6 |
|
T98 |
51 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T22 |
31 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T22 |
45 |
|
T97 |
2 |
|
T98 |
46 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T22 |
32 |
|
T97 |
2 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1179 |
1 |
|
|
T22 |
43 |
|
T97 |
6 |
|
T98 |
51 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T22 |
31 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1150 |
1 |
|
|
T22 |
42 |
|
T97 |
2 |
|
T98 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T22 |
32 |
|
T97 |
2 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1155 |
1 |
|
|
T22 |
43 |
|
T97 |
6 |
|
T98 |
49 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T22 |
31 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1122 |
1 |
|
|
T22 |
42 |
|
T97 |
2 |
|
T98 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T22 |
32 |
|
T97 |
2 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1122 |
1 |
|
|
T22 |
40 |
|
T97 |
6 |
|
T98 |
49 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T22 |
31 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1097 |
1 |
|
|
T22 |
41 |
|
T97 |
2 |
|
T98 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T22 |
32 |
|
T97 |
2 |
|
T98 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1086 |
1 |
|
|
T22 |
40 |
|
T97 |
6 |
|
T98 |
47 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
48661 |
1 |
|
|
T22 |
1484 |
|
T97 |
432 |
|
T98 |
2096 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42112 |
1 |
|
|
T22 |
2382 |
|
T97 |
140 |
|
T98 |
1532 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52508 |
1 |
|
|
T22 |
1865 |
|
T97 |
736 |
|
T98 |
1428 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45729 |
1 |
|
|
T22 |
1341 |
|
T97 |
106 |
|
T98 |
1581 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T22 |
32 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1597 |
1 |
|
|
T22 |
56 |
|
T97 |
3 |
|
T98 |
72 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T22 |
23 |
|
T97 |
5 |
|
T98 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T22 |
65 |
|
T97 |
3 |
|
T98 |
68 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T22 |
32 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T22 |
56 |
|
T97 |
3 |
|
T98 |
71 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T22 |
23 |
|
T97 |
5 |
|
T98 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T22 |
62 |
|
T97 |
3 |
|
T98 |
65 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T22 |
32 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T22 |
55 |
|
T97 |
3 |
|
T98 |
69 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T22 |
23 |
|
T97 |
5 |
|
T98 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T22 |
62 |
|
T97 |
3 |
|
T98 |
64 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
632 |
1 |
|
|
T22 |
32 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T22 |
55 |
|
T97 |
3 |
|
T98 |
66 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T22 |
23 |
|
T97 |
5 |
|
T98 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T22 |
61 |
|
T97 |
3 |
|
T98 |
63 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T22 |
32 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T22 |
52 |
|
T97 |
3 |
|
T98 |
64 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T22 |
23 |
|
T97 |
5 |
|
T98 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T22 |
61 |
|
T97 |
3 |
|
T98 |
63 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T22 |
32 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T22 |
50 |
|
T97 |
3 |
|
T98 |
64 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T22 |
23 |
|
T97 |
5 |
|
T98 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T22 |
60 |
|
T97 |
3 |
|
T98 |
62 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T22 |
32 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T22 |
49 |
|
T97 |
3 |
|
T98 |
62 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T22 |
23 |
|
T97 |
5 |
|
T98 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T22 |
59 |
|
T97 |
3 |
|
T98 |
60 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
618 |
1 |
|
|
T22 |
32 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T22 |
48 |
|
T97 |
3 |
|
T98 |
60 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T22 |
23 |
|
T97 |
5 |
|
T98 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T22 |
59 |
|
T97 |
3 |
|
T98 |
59 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T22 |
32 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T22 |
46 |
|
T97 |
3 |
|
T98 |
59 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T22 |
22 |
|
T97 |
5 |
|
T98 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T22 |
57 |
|
T97 |
3 |
|
T98 |
56 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
613 |
1 |
|
|
T22 |
32 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T22 |
43 |
|
T97 |
3 |
|
T98 |
59 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T22 |
22 |
|
T97 |
5 |
|
T98 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T22 |
55 |
|
T97 |
3 |
|
T98 |
55 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T22 |
32 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T22 |
41 |
|
T97 |
3 |
|
T98 |
56 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T22 |
55 |
|
T97 |
3 |
|
T98 |
55 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T22 |
32 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T22 |
40 |
|
T97 |
3 |
|
T98 |
56 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T22 |
55 |
|
T97 |
3 |
|
T98 |
54 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T22 |
32 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T22 |
38 |
|
T97 |
3 |
|
T98 |
55 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T22 |
55 |
|
T97 |
3 |
|
T98 |
50 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T22 |
32 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T22 |
36 |
|
T97 |
3 |
|
T98 |
53 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1225 |
1 |
|
|
T22 |
55 |
|
T97 |
3 |
|
T98 |
48 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T22 |
32 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1144 |
1 |
|
|
T22 |
35 |
|
T97 |
3 |
|
T98 |
52 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1185 |
1 |
|
|
T22 |
52 |
|
T97 |
2 |
|
T98 |
47 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52051 |
1 |
|
|
T22 |
2838 |
|
T97 |
102 |
|
T98 |
1234 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43710 |
1 |
|
|
T22 |
968 |
|
T97 |
236 |
|
T98 |
1404 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51403 |
1 |
|
|
T22 |
1765 |
|
T97 |
707 |
|
T98 |
2303 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42533 |
1 |
|
|
T22 |
1518 |
|
T97 |
184 |
|
T98 |
1464 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T22 |
64 |
|
T97 |
11 |
|
T98 |
73 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
28 |
|
T97 |
4 |
|
T98 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T22 |
61 |
|
T97 |
11 |
|
T98 |
78 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T22 |
63 |
|
T97 |
11 |
|
T98 |
72 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
28 |
|
T97 |
4 |
|
T98 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T22 |
60 |
|
T97 |
11 |
|
T98 |
75 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T22 |
62 |
|
T97 |
11 |
|
T98 |
72 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
28 |
|
T97 |
4 |
|
T98 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T22 |
58 |
|
T97 |
11 |
|
T98 |
74 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T22 |
61 |
|
T97 |
11 |
|
T98 |
71 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
28 |
|
T97 |
4 |
|
T98 |
20 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T22 |
57 |
|
T97 |
10 |
|
T98 |
72 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T22 |
57 |
|
T97 |
11 |
|
T98 |
68 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T22 |
28 |
|
T97 |
4 |
|
T98 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T22 |
56 |
|
T97 |
10 |
|
T98 |
71 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T22 |
54 |
|
T97 |
11 |
|
T98 |
66 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T22 |
28 |
|
T97 |
4 |
|
T98 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T22 |
55 |
|
T97 |
10 |
|
T98 |
70 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T22 |
52 |
|
T97 |
11 |
|
T98 |
66 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T22 |
28 |
|
T97 |
4 |
|
T98 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T22 |
54 |
|
T97 |
10 |
|
T98 |
68 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T22 |
52 |
|
T97 |
11 |
|
T98 |
65 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T22 |
28 |
|
T97 |
4 |
|
T98 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T22 |
53 |
|
T97 |
10 |
|
T98 |
67 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T22 |
50 |
|
T97 |
11 |
|
T98 |
63 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T22 |
28 |
|
T97 |
4 |
|
T98 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T22 |
51 |
|
T97 |
10 |
|
T98 |
65 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T22 |
50 |
|
T97 |
11 |
|
T98 |
62 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T22 |
28 |
|
T97 |
4 |
|
T98 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T22 |
50 |
|
T97 |
9 |
|
T98 |
65 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T22 |
48 |
|
T97 |
11 |
|
T98 |
62 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T22 |
50 |
|
T97 |
9 |
|
T98 |
63 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T22 |
47 |
|
T97 |
10 |
|
T98 |
61 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T22 |
49 |
|
T97 |
9 |
|
T98 |
61 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1150 |
1 |
|
|
T22 |
43 |
|
T97 |
10 |
|
T98 |
59 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T22 |
48 |
|
T97 |
9 |
|
T98 |
58 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1121 |
1 |
|
|
T22 |
40 |
|
T97 |
8 |
|
T98 |
55 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1185 |
1 |
|
|
T22 |
48 |
|
T97 |
9 |
|
T98 |
57 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1089 |
1 |
|
|
T22 |
39 |
|
T97 |
8 |
|
T98 |
54 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1156 |
1 |
|
|
T22 |
47 |
|
T97 |
9 |
|
T98 |
57 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
48309 |
1 |
|
|
T22 |
1517 |
|
T97 |
319 |
|
T98 |
1754 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41513 |
1 |
|
|
T22 |
1252 |
|
T97 |
126 |
|
T98 |
1192 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57852 |
1 |
|
|
T22 |
2792 |
|
T97 |
285 |
|
T98 |
2536 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42322 |
1 |
|
|
T22 |
1508 |
|
T97 |
622 |
|
T98 |
1232 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T22 |
62 |
|
T97 |
6 |
|
T98 |
55 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T22 |
24 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T22 |
66 |
|
T97 |
5 |
|
T98 |
58 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T22 |
60 |
|
T97 |
6 |
|
T98 |
54 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T22 |
24 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T22 |
65 |
|
T97 |
4 |
|
T98 |
58 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T22 |
57 |
|
T97 |
6 |
|
T98 |
53 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T22 |
24 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T22 |
63 |
|
T97 |
4 |
|
T98 |
58 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T22 |
56 |
|
T97 |
6 |
|
T98 |
51 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T22 |
24 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T22 |
61 |
|
T97 |
4 |
|
T98 |
57 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T22 |
54 |
|
T97 |
6 |
|
T98 |
50 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T22 |
24 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T22 |
60 |
|
T97 |
4 |
|
T98 |
56 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T22 |
54 |
|
T97 |
6 |
|
T98 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T22 |
24 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T22 |
59 |
|
T97 |
2 |
|
T98 |
54 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T22 |
54 |
|
T97 |
6 |
|
T98 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T22 |
24 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T22 |
59 |
|
T97 |
2 |
|
T98 |
53 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T22 |
54 |
|
T97 |
6 |
|
T98 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T22 |
24 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T22 |
57 |
|
T97 |
2 |
|
T98 |
50 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T22 |
51 |
|
T97 |
6 |
|
T98 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T22 |
23 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T22 |
57 |
|
T97 |
2 |
|
T98 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T22 |
48 |
|
T97 |
6 |
|
T98 |
43 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T22 |
23 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T22 |
57 |
|
T97 |
2 |
|
T98 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T22 |
47 |
|
T97 |
6 |
|
T98 |
43 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T22 |
23 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1225 |
1 |
|
|
T22 |
53 |
|
T97 |
2 |
|
T98 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T22 |
46 |
|
T97 |
6 |
|
T98 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T22 |
23 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1189 |
1 |
|
|
T22 |
52 |
|
T97 |
2 |
|
T98 |
43 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1190 |
1 |
|
|
T22 |
45 |
|
T97 |
6 |
|
T98 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T22 |
23 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1161 |
1 |
|
|
T22 |
51 |
|
T97 |
2 |
|
T98 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1165 |
1 |
|
|
T22 |
44 |
|
T97 |
6 |
|
T98 |
40 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T22 |
23 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1134 |
1 |
|
|
T22 |
50 |
|
T97 |
2 |
|
T98 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1140 |
1 |
|
|
T22 |
44 |
|
T97 |
6 |
|
T98 |
40 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T22 |
23 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1096 |
1 |
|
|
T22 |
50 |
|
T97 |
2 |
|
T98 |
36 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52114 |
1 |
|
|
T22 |
1563 |
|
T97 |
219 |
|
T98 |
1704 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44645 |
1 |
|
|
T22 |
2645 |
|
T97 |
142 |
|
T98 |
1142 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49853 |
1 |
|
|
T22 |
1705 |
|
T97 |
911 |
|
T98 |
1452 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43630 |
1 |
|
|
T22 |
1326 |
|
T97 |
98 |
|
T98 |
2328 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T22 |
21 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T22 |
62 |
|
T97 |
4 |
|
T98 |
60 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T22 |
57 |
|
T97 |
4 |
|
T98 |
60 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T22 |
21 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T22 |
59 |
|
T97 |
4 |
|
T98 |
60 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T22 |
57 |
|
T97 |
3 |
|
T98 |
59 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T22 |
21 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T22 |
58 |
|
T97 |
4 |
|
T98 |
58 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T22 |
56 |
|
T97 |
3 |
|
T98 |
58 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T22 |
21 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T22 |
57 |
|
T97 |
4 |
|
T98 |
57 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T22 |
52 |
|
T97 |
3 |
|
T98 |
57 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T22 |
21 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T22 |
57 |
|
T97 |
4 |
|
T98 |
55 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T22 |
50 |
|
T97 |
3 |
|
T98 |
56 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T22 |
21 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T22 |
57 |
|
T97 |
4 |
|
T98 |
54 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T22 |
48 |
|
T97 |
3 |
|
T98 |
55 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T22 |
21 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T22 |
55 |
|
T97 |
4 |
|
T98 |
53 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T22 |
46 |
|
T97 |
3 |
|
T98 |
55 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T22 |
21 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T22 |
55 |
|
T97 |
4 |
|
T98 |
53 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T22 |
45 |
|
T97 |
2 |
|
T98 |
53 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T22 |
21 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T22 |
55 |
|
T97 |
4 |
|
T98 |
53 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T22 |
43 |
|
T97 |
2 |
|
T98 |
51 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T22 |
21 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T22 |
55 |
|
T97 |
4 |
|
T98 |
51 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T22 |
43 |
|
T97 |
2 |
|
T98 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T22 |
21 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T22 |
53 |
|
T97 |
4 |
|
T98 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T22 |
40 |
|
T97 |
2 |
|
T98 |
49 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T22 |
21 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1198 |
1 |
|
|
T22 |
52 |
|
T97 |
4 |
|
T98 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T22 |
39 |
|
T97 |
2 |
|
T98 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T22 |
21 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1171 |
1 |
|
|
T22 |
52 |
|
T97 |
4 |
|
T98 |
49 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T22 |
38 |
|
T97 |
2 |
|
T98 |
46 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T22 |
21 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1130 |
1 |
|
|
T22 |
51 |
|
T97 |
4 |
|
T98 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1169 |
1 |
|
|
T22 |
38 |
|
T97 |
2 |
|
T98 |
46 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T22 |
21 |
|
T97 |
5 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1102 |
1 |
|
|
T22 |
51 |
|
T97 |
4 |
|
T98 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1130 |
1 |
|
|
T22 |
38 |
|
T97 |
2 |
|
T98 |
45 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50345 |
1 |
|
|
T22 |
1729 |
|
T97 |
84 |
|
T98 |
2587 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41738 |
1 |
|
|
T22 |
1420 |
|
T97 |
757 |
|
T98 |
1139 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54011 |
1 |
|
|
T22 |
3011 |
|
T97 |
176 |
|
T98 |
1769 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43288 |
1 |
|
|
T22 |
898 |
|
T97 |
155 |
|
T98 |
1144 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T22 |
58 |
|
T97 |
15 |
|
T98 |
52 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
29 |
|
T97 |
5 |
|
T98 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T22 |
58 |
|
T97 |
13 |
|
T98 |
54 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T22 |
58 |
|
T97 |
14 |
|
T98 |
52 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
29 |
|
T97 |
5 |
|
T98 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T22 |
57 |
|
T97 |
13 |
|
T98 |
54 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T22 |
58 |
|
T97 |
14 |
|
T98 |
51 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
29 |
|
T97 |
5 |
|
T98 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T22 |
54 |
|
T97 |
12 |
|
T98 |
51 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T22 |
58 |
|
T97 |
14 |
|
T98 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
29 |
|
T97 |
5 |
|
T98 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T22 |
54 |
|
T97 |
12 |
|
T98 |
51 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T22 |
57 |
|
T97 |
14 |
|
T98 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T22 |
29 |
|
T97 |
5 |
|
T98 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T22 |
53 |
|
T97 |
12 |
|
T98 |
51 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T22 |
55 |
|
T97 |
13 |
|
T98 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T22 |
29 |
|
T97 |
5 |
|
T98 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T22 |
53 |
|
T97 |
11 |
|
T98 |
49 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T22 |
55 |
|
T97 |
13 |
|
T98 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T22 |
29 |
|
T97 |
5 |
|
T98 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T22 |
52 |
|
T97 |
10 |
|
T98 |
49 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T22 |
54 |
|
T97 |
13 |
|
T98 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T22 |
29 |
|
T97 |
5 |
|
T98 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T22 |
50 |
|
T97 |
9 |
|
T98 |
49 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T22 |
54 |
|
T97 |
12 |
|
T98 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T22 |
29 |
|
T97 |
5 |
|
T98 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T22 |
50 |
|
T97 |
9 |
|
T98 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T22 |
53 |
|
T97 |
12 |
|
T98 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T22 |
29 |
|
T97 |
5 |
|
T98 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T22 |
48 |
|
T97 |
9 |
|
T98 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T22 |
53 |
|
T97 |
12 |
|
T98 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T22 |
29 |
|
T97 |
5 |
|
T98 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T22 |
45 |
|
T97 |
8 |
|
T98 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T22 |
53 |
|
T97 |
12 |
|
T98 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T22 |
29 |
|
T97 |
5 |
|
T98 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T22 |
44 |
|
T97 |
8 |
|
T98 |
37 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1178 |
1 |
|
|
T22 |
52 |
|
T97 |
12 |
|
T98 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T22 |
29 |
|
T97 |
5 |
|
T98 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1173 |
1 |
|
|
T22 |
42 |
|
T97 |
8 |
|
T98 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1139 |
1 |
|
|
T22 |
47 |
|
T97 |
12 |
|
T98 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T22 |
29 |
|
T97 |
5 |
|
T98 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1144 |
1 |
|
|
T22 |
41 |
|
T97 |
7 |
|
T98 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1113 |
1 |
|
|
T22 |
46 |
|
T97 |
11 |
|
T98 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T22 |
29 |
|
T97 |
5 |
|
T98 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1117 |
1 |
|
|
T22 |
38 |
|
T97 |
7 |
|
T98 |
35 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52414 |
1 |
|
|
T22 |
1297 |
|
T97 |
724 |
|
T98 |
1484 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44512 |
1 |
|
|
T22 |
1203 |
|
T97 |
111 |
|
T98 |
2281 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
46271 |
1 |
|
|
T22 |
1971 |
|
T97 |
221 |
|
T98 |
1350 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46032 |
1 |
|
|
T22 |
2690 |
|
T97 |
198 |
|
T98 |
1411 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T22 |
24 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T22 |
62 |
|
T97 |
10 |
|
T98 |
70 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T22 |
31 |
|
T97 |
6 |
|
T98 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T22 |
56 |
|
T97 |
8 |
|
T98 |
69 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T22 |
24 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T22 |
60 |
|
T97 |
10 |
|
T98 |
70 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T22 |
31 |
|
T97 |
6 |
|
T98 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T22 |
52 |
|
T97 |
8 |
|
T98 |
68 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T22 |
24 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T22 |
60 |
|
T97 |
10 |
|
T98 |
68 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T22 |
31 |
|
T97 |
6 |
|
T98 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T22 |
52 |
|
T97 |
8 |
|
T98 |
68 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T22 |
24 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T22 |
59 |
|
T97 |
10 |
|
T98 |
65 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T22 |
31 |
|
T97 |
6 |
|
T98 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T22 |
50 |
|
T97 |
8 |
|
T98 |
68 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T22 |
24 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T22 |
57 |
|
T97 |
10 |
|
T98 |
64 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T22 |
31 |
|
T97 |
6 |
|
T98 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T22 |
49 |
|
T97 |
8 |
|
T98 |
67 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T22 |
24 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T22 |
56 |
|
T97 |
10 |
|
T98 |
61 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T22 |
31 |
|
T97 |
6 |
|
T98 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T22 |
47 |
|
T97 |
8 |
|
T98 |
66 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T22 |
24 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T22 |
56 |
|
T97 |
10 |
|
T98 |
60 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T22 |
31 |
|
T97 |
6 |
|
T98 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T22 |
43 |
|
T97 |
7 |
|
T98 |
64 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T22 |
24 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T22 |
54 |
|
T97 |
10 |
|
T98 |
59 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T22 |
31 |
|
T97 |
6 |
|
T98 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T22 |
42 |
|
T97 |
7 |
|
T98 |
63 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T22 |
24 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T22 |
54 |
|
T97 |
9 |
|
T98 |
58 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T22 |
30 |
|
T97 |
6 |
|
T98 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T22 |
42 |
|
T97 |
7 |
|
T98 |
62 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T22 |
24 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T22 |
54 |
|
T97 |
9 |
|
T98 |
57 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T22 |
30 |
|
T97 |
6 |
|
T98 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T22 |
41 |
|
T97 |
6 |
|
T98 |
61 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T22 |
24 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T22 |
52 |
|
T97 |
9 |
|
T98 |
56 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T22 |
30 |
|
T97 |
5 |
|
T98 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T22 |
41 |
|
T97 |
5 |
|
T98 |
59 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T22 |
24 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1190 |
1 |
|
|
T22 |
50 |
|
T97 |
7 |
|
T98 |
53 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T22 |
30 |
|
T97 |
5 |
|
T98 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T22 |
41 |
|
T97 |
5 |
|
T98 |
58 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
24 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1153 |
1 |
|
|
T22 |
48 |
|
T97 |
7 |
|
T98 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T22 |
30 |
|
T97 |
5 |
|
T98 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T22 |
41 |
|
T97 |
5 |
|
T98 |
57 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
24 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1109 |
1 |
|
|
T22 |
46 |
|
T97 |
7 |
|
T98 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T22 |
30 |
|
T97 |
5 |
|
T98 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T22 |
38 |
|
T97 |
5 |
|
T98 |
55 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
24 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1077 |
1 |
|
|
T22 |
45 |
|
T97 |
6 |
|
T98 |
45 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T22 |
30 |
|
T97 |
5 |
|
T98 |
23 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1166 |
1 |
|
|
T22 |
36 |
|
T97 |
5 |
|
T98 |
55 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54140 |
1 |
|
|
T22 |
1601 |
|
T97 |
767 |
|
T98 |
1656 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
38451 |
1 |
|
|
T22 |
1214 |
|
T97 |
218 |
|
T98 |
1284 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58681 |
1 |
|
|
T22 |
3407 |
|
T97 |
121 |
|
T98 |
1425 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39716 |
1 |
|
|
T22 |
1058 |
|
T97 |
164 |
|
T98 |
2233 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T22 |
54 |
|
T97 |
9 |
|
T98 |
58 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T22 |
27 |
|
T97 |
3 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T22 |
54 |
|
T97 |
10 |
|
T98 |
59 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T22 |
54 |
|
T97 |
9 |
|
T98 |
58 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T22 |
27 |
|
T97 |
3 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T22 |
53 |
|
T97 |
10 |
|
T98 |
59 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T22 |
53 |
|
T97 |
9 |
|
T98 |
57 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T22 |
27 |
|
T97 |
3 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T22 |
51 |
|
T97 |
10 |
|
T98 |
58 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T22 |
53 |
|
T97 |
8 |
|
T98 |
57 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T22 |
27 |
|
T97 |
3 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T22 |
50 |
|
T97 |
10 |
|
T98 |
58 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T22 |
53 |
|
T97 |
7 |
|
T98 |
55 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T22 |
27 |
|
T97 |
3 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T22 |
47 |
|
T97 |
10 |
|
T98 |
58 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T22 |
51 |
|
T97 |
7 |
|
T98 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T22 |
27 |
|
T97 |
3 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T22 |
45 |
|
T97 |
10 |
|
T98 |
56 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T22 |
50 |
|
T97 |
7 |
|
T98 |
53 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T22 |
27 |
|
T97 |
3 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T22 |
45 |
|
T97 |
10 |
|
T98 |
56 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T22 |
49 |
|
T97 |
7 |
|
T98 |
53 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T22 |
27 |
|
T97 |
3 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T22 |
43 |
|
T97 |
10 |
|
T98 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T22 |
48 |
|
T97 |
7 |
|
T98 |
53 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T22 |
26 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T22 |
42 |
|
T97 |
10 |
|
T98 |
52 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T22 |
48 |
|
T97 |
7 |
|
T98 |
51 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T22 |
26 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T22 |
40 |
|
T97 |
10 |
|
T98 |
52 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T22 |
47 |
|
T97 |
7 |
|
T98 |
47 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T22 |
26 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T22 |
40 |
|
T97 |
10 |
|
T98 |
49 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1199 |
1 |
|
|
T22 |
47 |
|
T97 |
7 |
|
T98 |
47 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T22 |
26 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T22 |
38 |
|
T97 |
10 |
|
T98 |
47 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1169 |
1 |
|
|
T22 |
46 |
|
T97 |
7 |
|
T98 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T22 |
26 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1139 |
1 |
|
|
T22 |
35 |
|
T97 |
9 |
|
T98 |
43 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1143 |
1 |
|
|
T22 |
46 |
|
T97 |
7 |
|
T98 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T22 |
26 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1111 |
1 |
|
|
T22 |
34 |
|
T97 |
9 |
|
T98 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1114 |
1 |
|
|
T22 |
45 |
|
T97 |
7 |
|
T98 |
46 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T22 |
26 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1075 |
1 |
|
|
T22 |
34 |
|
T97 |
8 |
|
T98 |
39 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50130 |
1 |
|
|
T22 |
2689 |
|
T97 |
722 |
|
T98 |
1838 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48227 |
1 |
|
|
T22 |
1267 |
|
T97 |
192 |
|
T98 |
1444 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
46516 |
1 |
|
|
T22 |
1939 |
|
T97 |
250 |
|
T98 |
1511 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44715 |
1 |
|
|
T22 |
1409 |
|
T97 |
143 |
|
T98 |
2072 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T22 |
57 |
|
T97 |
8 |
|
T98 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T22 |
56 |
|
T97 |
8 |
|
T98 |
53 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T22 |
57 |
|
T97 |
8 |
|
T98 |
49 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T22 |
55 |
|
T97 |
8 |
|
T98 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T22 |
56 |
|
T97 |
8 |
|
T98 |
48 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T22 |
55 |
|
T97 |
8 |
|
T98 |
48 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T22 |
56 |
|
T97 |
8 |
|
T98 |
48 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T22 |
53 |
|
T97 |
8 |
|
T98 |
45 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T22 |
55 |
|
T97 |
7 |
|
T98 |
47 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T22 |
53 |
|
T97 |
8 |
|
T98 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T22 |
53 |
|
T97 |
7 |
|
T98 |
47 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T22 |
51 |
|
T97 |
8 |
|
T98 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T22 |
53 |
|
T97 |
7 |
|
T98 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T22 |
49 |
|
T97 |
7 |
|
T98 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T22 |
49 |
|
T97 |
7 |
|
T98 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T22 |
48 |
|
T97 |
7 |
|
T98 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T22 |
49 |
|
T97 |
7 |
|
T98 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T22 |
48 |
|
T97 |
7 |
|
T98 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T22 |
47 |
|
T97 |
6 |
|
T98 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T22 |
47 |
|
T97 |
7 |
|
T98 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T22 |
46 |
|
T97 |
6 |
|
T98 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T22 |
47 |
|
T97 |
7 |
|
T98 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T22 |
44 |
|
T97 |
6 |
|
T98 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T22 |
47 |
|
T97 |
7 |
|
T98 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T22 |
43 |
|
T97 |
6 |
|
T98 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1212 |
1 |
|
|
T22 |
46 |
|
T97 |
6 |
|
T98 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T22 |
43 |
|
T97 |
6 |
|
T98 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T22 |
44 |
|
T97 |
6 |
|
T98 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1141 |
1 |
|
|
T22 |
42 |
|
T97 |
6 |
|
T98 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
618 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1150 |
1 |
|
|
T22 |
42 |
|
T97 |
6 |
|
T98 |
35 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
49859 |
1 |
|
|
T22 |
3325 |
|
T97 |
94 |
|
T98 |
2021 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39846 |
1 |
|
|
T22 |
1185 |
|
T97 |
731 |
|
T98 |
2054 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58706 |
1 |
|
|
T22 |
1707 |
|
T97 |
332 |
|
T98 |
1328 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42144 |
1 |
|
|
T22 |
836 |
|
T97 |
155 |
|
T98 |
1493 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T22 |
59 |
|
T97 |
10 |
|
T98 |
57 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T22 |
33 |
|
T97 |
3 |
|
T98 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T22 |
57 |
|
T97 |
9 |
|
T98 |
59 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T22 |
59 |
|
T97 |
10 |
|
T98 |
56 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T22 |
33 |
|
T97 |
3 |
|
T98 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T22 |
54 |
|
T97 |
9 |
|
T98 |
58 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T22 |
59 |
|
T97 |
10 |
|
T98 |
54 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T22 |
33 |
|
T97 |
3 |
|
T98 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T22 |
53 |
|
T97 |
9 |
|
T98 |
57 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T22 |
56 |
|
T97 |
9 |
|
T98 |
54 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T22 |
33 |
|
T97 |
3 |
|
T98 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T22 |
50 |
|
T97 |
9 |
|
T98 |
57 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T22 |
54 |
|
T97 |
8 |
|
T98 |
54 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T22 |
33 |
|
T97 |
3 |
|
T98 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T22 |
49 |
|
T97 |
9 |
|
T98 |
55 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T22 |
52 |
|
T97 |
8 |
|
T98 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T22 |
33 |
|
T97 |
3 |
|
T98 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T22 |
49 |
|
T97 |
9 |
|
T98 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T22 |
51 |
|
T97 |
8 |
|
T98 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T22 |
33 |
|
T97 |
3 |
|
T98 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T22 |
46 |
|
T97 |
9 |
|
T98 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T22 |
51 |
|
T97 |
8 |
|
T98 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T22 |
33 |
|
T97 |
3 |
|
T98 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T22 |
44 |
|
T97 |
9 |
|
T98 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T22 |
51 |
|
T97 |
8 |
|
T98 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T22 |
33 |
|
T97 |
3 |
|
T98 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T22 |
42 |
|
T97 |
9 |
|
T98 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T22 |
50 |
|
T97 |
7 |
|
T98 |
43 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T22 |
33 |
|
T97 |
3 |
|
T98 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T22 |
41 |
|
T97 |
9 |
|
T98 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T22 |
48 |
|
T97 |
7 |
|
T98 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T22 |
33 |
|
T97 |
3 |
|
T98 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T22 |
40 |
|
T97 |
9 |
|
T98 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1171 |
1 |
|
|
T22 |
48 |
|
T97 |
7 |
|
T98 |
39 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T22 |
33 |
|
T97 |
3 |
|
T98 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T22 |
38 |
|
T97 |
8 |
|
T98 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1147 |
1 |
|
|
T22 |
48 |
|
T97 |
7 |
|
T98 |
39 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T22 |
33 |
|
T97 |
3 |
|
T98 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1135 |
1 |
|
|
T22 |
37 |
|
T97 |
6 |
|
T98 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1113 |
1 |
|
|
T22 |
47 |
|
T97 |
7 |
|
T98 |
37 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T22 |
33 |
|
T97 |
3 |
|
T98 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1108 |
1 |
|
|
T22 |
36 |
|
T97 |
6 |
|
T98 |
46 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1079 |
1 |
|
|
T22 |
47 |
|
T97 |
7 |
|
T98 |
36 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T22 |
33 |
|
T97 |
3 |
|
T98 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1086 |
1 |
|
|
T22 |
34 |
|
T97 |
6 |
|
T98 |
46 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50067 |
1 |
|
|
T22 |
1786 |
|
T97 |
237 |
|
T98 |
2022 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43292 |
1 |
|
|
T22 |
1477 |
|
T97 |
234 |
|
T98 |
1223 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51516 |
1 |
|
|
T22 |
2578 |
|
T97 |
106 |
|
T98 |
1777 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46197 |
1 |
|
|
T22 |
1255 |
|
T97 |
692 |
|
T98 |
2007 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T22 |
65 |
|
T97 |
9 |
|
T98 |
49 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T22 |
66 |
|
T97 |
10 |
|
T98 |
47 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T22 |
62 |
|
T97 |
9 |
|
T98 |
49 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T22 |
66 |
|
T97 |
10 |
|
T98 |
46 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T22 |
62 |
|
T97 |
9 |
|
T98 |
48 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T22 |
66 |
|
T97 |
10 |
|
T98 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T22 |
60 |
|
T97 |
9 |
|
T98 |
48 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T22 |
65 |
|
T97 |
9 |
|
T98 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T22 |
60 |
|
T97 |
9 |
|
T98 |
48 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T22 |
63 |
|
T97 |
9 |
|
T98 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T22 |
60 |
|
T97 |
9 |
|
T98 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T22 |
62 |
|
T97 |
9 |
|
T98 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T22 |
58 |
|
T97 |
8 |
|
T98 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T22 |
60 |
|
T97 |
9 |
|
T98 |
41 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T22 |
58 |
|
T97 |
8 |
|
T98 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T22 |
58 |
|
T97 |
8 |
|
T98 |
40 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T22 |
55 |
|
T97 |
8 |
|
T98 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T22 |
21 |
|
T97 |
4 |
|
T98 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T22 |
58 |
|
T97 |
8 |
|
T98 |
40 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T22 |
55 |
|
T97 |
8 |
|
T98 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T22 |
21 |
|
T97 |
4 |
|
T98 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T22 |
54 |
|
T97 |
7 |
|
T98 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T22 |
55 |
|
T97 |
8 |
|
T98 |
41 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T22 |
21 |
|
T97 |
4 |
|
T98 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T22 |
53 |
|
T97 |
7 |
|
T98 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T22 |
54 |
|
T97 |
7 |
|
T98 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T22 |
21 |
|
T97 |
4 |
|
T98 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T22 |
51 |
|
T97 |
7 |
|
T98 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T22 |
52 |
|
T97 |
7 |
|
T98 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T22 |
21 |
|
T97 |
4 |
|
T98 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1148 |
1 |
|
|
T22 |
49 |
|
T97 |
7 |
|
T98 |
37 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1138 |
1 |
|
|
T22 |
50 |
|
T97 |
6 |
|
T98 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T22 |
21 |
|
T97 |
4 |
|
T98 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1122 |
1 |
|
|
T22 |
47 |
|
T97 |
7 |
|
T98 |
35 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1109 |
1 |
|
|
T22 |
48 |
|
T97 |
6 |
|
T98 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T22 |
21 |
|
T97 |
4 |
|
T98 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1093 |
1 |
|
|
T22 |
42 |
|
T97 |
7 |
|
T98 |
35 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
48170 |
1 |
|
|
T22 |
1489 |
|
T97 |
429 |
|
T98 |
1056 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45897 |
1 |
|
|
T22 |
1315 |
|
T97 |
127 |
|
T98 |
2148 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
48986 |
1 |
|
|
T22 |
1677 |
|
T97 |
151 |
|
T98 |
2077 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45545 |
1 |
|
|
T22 |
2562 |
|
T97 |
656 |
|
T98 |
1536 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T22 |
63 |
|
T97 |
5 |
|
T98 |
65 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T22 |
25 |
|
T97 |
5 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1612 |
1 |
|
|
T22 |
65 |
|
T97 |
5 |
|
T98 |
63 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T22 |
62 |
|
T97 |
5 |
|
T98 |
63 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T22 |
25 |
|
T97 |
5 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T22 |
63 |
|
T97 |
5 |
|
T98 |
62 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T22 |
61 |
|
T97 |
5 |
|
T98 |
61 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T22 |
25 |
|
T97 |
5 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T22 |
62 |
|
T97 |
5 |
|
T98 |
62 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T22 |
58 |
|
T97 |
5 |
|
T98 |
57 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T22 |
25 |
|
T97 |
5 |
|
T98 |
20 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T22 |
60 |
|
T97 |
5 |
|
T98 |
61 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T22 |
57 |
|
T97 |
5 |
|
T98 |
57 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T22 |
25 |
|
T97 |
5 |
|
T98 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T22 |
59 |
|
T97 |
5 |
|
T98 |
60 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T22 |
53 |
|
T97 |
5 |
|
T98 |
56 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T22 |
25 |
|
T97 |
5 |
|
T98 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T22 |
58 |
|
T97 |
5 |
|
T98 |
60 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T22 |
53 |
|
T97 |
5 |
|
T98 |
53 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T22 |
25 |
|
T97 |
5 |
|
T98 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T22 |
57 |
|
T97 |
5 |
|
T98 |
59 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T22 |
52 |
|
T97 |
5 |
|
T98 |
52 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T22 |
25 |
|
T97 |
5 |
|
T98 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T22 |
57 |
|
T97 |
5 |
|
T98 |
57 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T22 |
52 |
|
T97 |
5 |
|
T98 |
50 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T22 |
25 |
|
T97 |
5 |
|
T98 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T22 |
57 |
|
T97 |
5 |
|
T98 |
55 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T22 |
51 |
|
T97 |
4 |
|
T98 |
49 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T22 |
25 |
|
T97 |
5 |
|
T98 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T22 |
56 |
|
T97 |
5 |
|
T98 |
54 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T22 |
49 |
|
T97 |
4 |
|
T98 |
49 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T22 |
25 |
|
T97 |
4 |
|
T98 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T22 |
55 |
|
T97 |
5 |
|
T98 |
54 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T22 |
47 |
|
T97 |
4 |
|
T98 |
48 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T22 |
25 |
|
T97 |
4 |
|
T98 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T22 |
54 |
|
T97 |
4 |
|
T98 |
51 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T22 |
47 |
|
T97 |
4 |
|
T98 |
47 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T22 |
25 |
|
T97 |
4 |
|
T98 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T22 |
53 |
|
T97 |
4 |
|
T98 |
51 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T22 |
47 |
|
T97 |
4 |
|
T98 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T22 |
25 |
|
T97 |
4 |
|
T98 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T22 |
51 |
|
T97 |
4 |
|
T98 |
51 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
624 |
1 |
|
|
T22 |
26 |
|
T97 |
4 |
|
T98 |
18 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1167 |
1 |
|
|
T22 |
47 |
|
T97 |
4 |
|
T98 |
45 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T22 |
25 |
|
T97 |
4 |
|
T98 |
19 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T22 |
49 |
|
T97 |
4 |
|
T98 |
50 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54866 |
1 |
|
|
T22 |
2883 |
|
T97 |
214 |
|
T98 |
1345 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42519 |
1 |
|
|
T22 |
1385 |
|
T97 |
171 |
|
T98 |
1183 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51087 |
1 |
|
|
T22 |
1626 |
|
T97 |
737 |
|
T98 |
3017 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40493 |
1 |
|
|
T22 |
1326 |
|
T97 |
271 |
|
T98 |
1318 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T22 |
26 |
|
T98 |
32 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T22 |
58 |
|
T97 |
8 |
|
T98 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T22 |
61 |
|
T97 |
6 |
|
T98 |
51 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T22 |
26 |
|
T98 |
32 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T22 |
56 |
|
T97 |
8 |
|
T98 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T22 |
58 |
|
T97 |
6 |
|
T98 |
51 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T22 |
26 |
|
T98 |
32 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T22 |
54 |
|
T97 |
8 |
|
T98 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T22 |
56 |
|
T97 |
6 |
|
T98 |
50 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T22 |
26 |
|
T98 |
32 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T22 |
52 |
|
T97 |
8 |
|
T98 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T22 |
56 |
|
T97 |
5 |
|
T98 |
50 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T22 |
26 |
|
T98 |
32 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T22 |
52 |
|
T97 |
8 |
|
T98 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T22 |
55 |
|
T97 |
5 |
|
T98 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T22 |
26 |
|
T98 |
32 |
|
T99 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T22 |
50 |
|
T97 |
8 |
|
T98 |
40 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T22 |
54 |
|
T97 |
5 |
|
T98 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T22 |
26 |
|
T98 |
32 |
|
T99 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T22 |
49 |
|
T97 |
8 |
|
T98 |
40 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T22 |
53 |
|
T97 |
5 |
|
T98 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T22 |
26 |
|
T98 |
32 |
|
T99 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T22 |
48 |
|
T97 |
8 |
|
T98 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T22 |
53 |
|
T97 |
5 |
|
T98 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T22 |
26 |
|
T98 |
32 |
|
T99 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T22 |
47 |
|
T97 |
8 |
|
T98 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T22 |
51 |
|
T97 |
5 |
|
T98 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T22 |
26 |
|
T98 |
32 |
|
T99 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T22 |
47 |
|
T97 |
8 |
|
T98 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T22 |
50 |
|
T97 |
5 |
|
T98 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T22 |
26 |
|
T98 |
32 |
|
T99 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T22 |
46 |
|
T97 |
8 |
|
T98 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T22 |
50 |
|
T97 |
5 |
|
T98 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T22 |
26 |
|
T98 |
32 |
|
T99 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T22 |
45 |
|
T97 |
8 |
|
T98 |
36 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T22 |
49 |
|
T97 |
5 |
|
T98 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T22 |
26 |
|
T98 |
32 |
|
T99 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1205 |
1 |
|
|
T22 |
44 |
|
T97 |
7 |
|
T98 |
36 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T22 |
48 |
|
T97 |
5 |
|
T98 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T22 |
26 |
|
T98 |
32 |
|
T99 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T22 |
41 |
|
T97 |
7 |
|
T98 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T22 |
48 |
|
T97 |
5 |
|
T98 |
42 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
629 |
1 |
|
|
T22 |
26 |
|
T98 |
32 |
|
T99 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1140 |
1 |
|
|
T22 |
37 |
|
T97 |
7 |
|
T98 |
34 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
26 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1182 |
1 |
|
|
T22 |
47 |
|
T97 |
5 |
|
T98 |
42 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52205 |
1 |
|
|
T22 |
1988 |
|
T97 |
163 |
|
T98 |
1315 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40509 |
1 |
|
|
T22 |
1154 |
|
T97 |
799 |
|
T98 |
1368 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57351 |
1 |
|
|
T22 |
3048 |
|
T97 |
68 |
|
T98 |
1657 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40303 |
1 |
|
|
T22 |
1132 |
|
T97 |
220 |
|
T98 |
2300 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T22 |
52 |
|
T97 |
13 |
|
T98 |
69 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T22 |
53 |
|
T97 |
13 |
|
T98 |
67 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T22 |
52 |
|
T97 |
13 |
|
T98 |
66 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T22 |
52 |
|
T97 |
13 |
|
T98 |
64 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T22 |
51 |
|
T97 |
12 |
|
T98 |
65 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T22 |
51 |
|
T97 |
13 |
|
T98 |
62 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T22 |
51 |
|
T97 |
12 |
|
T98 |
62 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
25 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T22 |
49 |
|
T97 |
13 |
|
T98 |
60 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T22 |
51 |
|
T97 |
12 |
|
T98 |
60 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T22 |
47 |
|
T97 |
12 |
|
T98 |
59 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T22 |
51 |
|
T97 |
12 |
|
T98 |
58 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T22 |
45 |
|
T97 |
11 |
|
T98 |
57 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T22 |
51 |
|
T97 |
12 |
|
T98 |
56 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T22 |
45 |
|
T97 |
10 |
|
T98 |
57 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T22 |
49 |
|
T97 |
12 |
|
T98 |
53 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T22 |
44 |
|
T97 |
10 |
|
T98 |
56 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T22 |
48 |
|
T97 |
11 |
|
T98 |
52 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T22 |
41 |
|
T97 |
10 |
|
T98 |
56 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T22 |
45 |
|
T97 |
11 |
|
T98 |
51 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T22 |
39 |
|
T97 |
10 |
|
T98 |
56 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T22 |
42 |
|
T97 |
11 |
|
T98 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T22 |
26 |
|
T97 |
1 |
|
T98 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T22 |
39 |
|
T97 |
9 |
|
T98 |
55 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T22 |
42 |
|
T97 |
11 |
|
T98 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T22 |
26 |
|
T97 |
1 |
|
T98 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T22 |
39 |
|
T97 |
9 |
|
T98 |
55 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1171 |
1 |
|
|
T22 |
41 |
|
T97 |
11 |
|
T98 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T22 |
26 |
|
T97 |
1 |
|
T98 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1166 |
1 |
|
|
T22 |
38 |
|
T97 |
8 |
|
T98 |
53 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1143 |
1 |
|
|
T22 |
40 |
|
T97 |
11 |
|
T98 |
47 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T22 |
26 |
|
T97 |
1 |
|
T98 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1141 |
1 |
|
|
T22 |
37 |
|
T97 |
6 |
|
T98 |
52 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1118 |
1 |
|
|
T22 |
40 |
|
T97 |
11 |
|
T98 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T22 |
26 |
|
T97 |
1 |
|
T98 |
24 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1113 |
1 |
|
|
T22 |
36 |
|
T97 |
6 |
|
T98 |
51 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52492 |
1 |
|
|
T22 |
1806 |
|
T97 |
80 |
|
T98 |
2163 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42667 |
1 |
|
|
T22 |
1134 |
|
T97 |
117 |
|
T98 |
1179 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54303 |
1 |
|
|
T22 |
2020 |
|
T97 |
854 |
|
T98 |
1706 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40109 |
1 |
|
|
T22 |
2350 |
|
T97 |
256 |
|
T98 |
1633 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T22 |
56 |
|
T97 |
9 |
|
T98 |
62 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T22 |
56 |
|
T97 |
9 |
|
T98 |
60 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T22 |
55 |
|
T97 |
9 |
|
T98 |
61 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T22 |
55 |
|
T97 |
9 |
|
T98 |
58 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T22 |
55 |
|
T97 |
9 |
|
T98 |
57 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T22 |
53 |
|
T97 |
9 |
|
T98 |
58 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T22 |
54 |
|
T97 |
9 |
|
T98 |
55 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T22 |
53 |
|
T97 |
9 |
|
T98 |
57 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T22 |
53 |
|
T97 |
8 |
|
T98 |
54 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T22 |
49 |
|
T97 |
9 |
|
T98 |
56 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T22 |
53 |
|
T97 |
6 |
|
T98 |
54 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T22 |
48 |
|
T97 |
9 |
|
T98 |
55 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T22 |
53 |
|
T97 |
6 |
|
T98 |
53 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T22 |
46 |
|
T97 |
9 |
|
T98 |
53 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T22 |
53 |
|
T97 |
5 |
|
T98 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T22 |
46 |
|
T97 |
9 |
|
T98 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T22 |
52 |
|
T97 |
5 |
|
T98 |
51 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T22 |
45 |
|
T97 |
9 |
|
T98 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T22 |
51 |
|
T97 |
4 |
|
T98 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T22 |
44 |
|
T97 |
9 |
|
T98 |
49 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T22 |
50 |
|
T97 |
4 |
|
T98 |
49 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T22 |
44 |
|
T97 |
9 |
|
T98 |
48 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1213 |
1 |
|
|
T22 |
49 |
|
T97 |
4 |
|
T98 |
49 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T22 |
42 |
|
T97 |
9 |
|
T98 |
48 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T22 |
49 |
|
T97 |
3 |
|
T98 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1170 |
1 |
|
|
T22 |
41 |
|
T97 |
9 |
|
T98 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1160 |
1 |
|
|
T22 |
47 |
|
T97 |
3 |
|
T98 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1136 |
1 |
|
|
T22 |
41 |
|
T97 |
9 |
|
T98 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
25 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1130 |
1 |
|
|
T22 |
46 |
|
T97 |
2 |
|
T98 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1108 |
1 |
|
|
T22 |
39 |
|
T97 |
9 |
|
T98 |
45 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57369 |
1 |
|
|
T22 |
3464 |
|
T97 |
335 |
|
T98 |
2693 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42013 |
1 |
|
|
T22 |
1321 |
|
T97 |
173 |
|
T98 |
1431 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
48563 |
1 |
|
|
T22 |
1567 |
|
T97 |
249 |
|
T98 |
1576 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42722 |
1 |
|
|
T22 |
947 |
|
T97 |
614 |
|
T98 |
1069 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T22 |
52 |
|
T97 |
5 |
|
T98 |
62 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T22 |
55 |
|
T97 |
7 |
|
T98 |
58 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T22 |
52 |
|
T97 |
5 |
|
T98 |
61 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T22 |
55 |
|
T97 |
6 |
|
T98 |
58 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T22 |
50 |
|
T97 |
5 |
|
T98 |
61 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T22 |
55 |
|
T97 |
6 |
|
T98 |
54 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T22 |
50 |
|
T97 |
5 |
|
T98 |
61 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T22 |
55 |
|
T97 |
6 |
|
T98 |
53 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T22 |
49 |
|
T97 |
5 |
|
T98 |
60 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T22 |
53 |
|
T97 |
5 |
|
T98 |
51 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T22 |
49 |
|
T97 |
5 |
|
T98 |
59 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T22 |
52 |
|
T97 |
5 |
|
T98 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T22 |
47 |
|
T97 |
4 |
|
T98 |
59 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T22 |
51 |
|
T97 |
5 |
|
T98 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T22 |
46 |
|
T97 |
4 |
|
T98 |
59 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T22 |
50 |
|
T97 |
4 |
|
T98 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T22 |
45 |
|
T97 |
4 |
|
T98 |
58 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T22 |
49 |
|
T97 |
4 |
|
T98 |
45 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T22 |
44 |
|
T97 |
3 |
|
T98 |
58 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T22 |
47 |
|
T97 |
4 |
|
T98 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T22 |
43 |
|
T97 |
3 |
|
T98 |
58 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T22 |
45 |
|
T97 |
4 |
|
T98 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
627 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T22 |
43 |
|
T97 |
3 |
|
T98 |
57 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T22 |
45 |
|
T97 |
4 |
|
T98 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1182 |
1 |
|
|
T22 |
41 |
|
T97 |
3 |
|
T98 |
56 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1163 |
1 |
|
|
T22 |
43 |
|
T97 |
4 |
|
T98 |
39 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1144 |
1 |
|
|
T22 |
41 |
|
T97 |
3 |
|
T98 |
54 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1130 |
1 |
|
|
T22 |
42 |
|
T97 |
4 |
|
T98 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
21 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1120 |
1 |
|
|
T22 |
40 |
|
T97 |
3 |
|
T98 |
52 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1098 |
1 |
|
|
T22 |
40 |
|
T97 |
4 |
|
T98 |
37 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
48409 |
1 |
|
|
T22 |
1877 |
|
T97 |
164 |
|
T98 |
1659 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45382 |
1 |
|
|
T22 |
1192 |
|
T97 |
171 |
|
T98 |
1280 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49575 |
1 |
|
|
T22 |
1797 |
|
T97 |
246 |
|
T98 |
2629 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46502 |
1 |
|
|
T22 |
2385 |
|
T97 |
751 |
|
T98 |
1201 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T22 |
32 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T22 |
47 |
|
T97 |
8 |
|
T98 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T22 |
52 |
|
T97 |
9 |
|
T98 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T22 |
32 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T22 |
47 |
|
T97 |
8 |
|
T98 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T22 |
52 |
|
T97 |
8 |
|
T98 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T22 |
32 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T22 |
47 |
|
T97 |
8 |
|
T98 |
53 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T22 |
52 |
|
T97 |
8 |
|
T98 |
53 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T22 |
32 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T22 |
47 |
|
T97 |
8 |
|
T98 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T22 |
48 |
|
T97 |
8 |
|
T98 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T22 |
32 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T22 |
46 |
|
T97 |
8 |
|
T98 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T22 |
48 |
|
T97 |
8 |
|
T98 |
53 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T22 |
32 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T22 |
46 |
|
T97 |
7 |
|
T98 |
50 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T22 |
47 |
|
T97 |
7 |
|
T98 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T22 |
32 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T22 |
44 |
|
T97 |
7 |
|
T98 |
49 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T22 |
45 |
|
T97 |
7 |
|
T98 |
50 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T22 |
32 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T22 |
42 |
|
T97 |
7 |
|
T98 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T22 |
45 |
|
T97 |
7 |
|
T98 |
50 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T22 |
32 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T22 |
42 |
|
T97 |
7 |
|
T98 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T22 |
43 |
|
T97 |
6 |
|
T98 |
49 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T22 |
32 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T22 |
40 |
|
T97 |
7 |
|
T98 |
42 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T22 |
43 |
|
T97 |
6 |
|
T98 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T22 |
32 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T22 |
39 |
|
T97 |
7 |
|
T98 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T22 |
42 |
|
T97 |
6 |
|
T98 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T22 |
32 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T22 |
39 |
|
T97 |
7 |
|
T98 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1237 |
1 |
|
|
T22 |
42 |
|
T97 |
6 |
|
T98 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T22 |
32 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T22 |
37 |
|
T97 |
6 |
|
T98 |
39 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T22 |
41 |
|
T97 |
6 |
|
T98 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T22 |
32 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1162 |
1 |
|
|
T22 |
35 |
|
T97 |
6 |
|
T98 |
39 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T22 |
40 |
|
T97 |
6 |
|
T98 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T22 |
32 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1139 |
1 |
|
|
T22 |
34 |
|
T97 |
6 |
|
T98 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1149 |
1 |
|
|
T22 |
40 |
|
T97 |
6 |
|
T98 |
45 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53539 |
1 |
|
|
T22 |
3002 |
|
T97 |
678 |
|
T98 |
2708 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41256 |
1 |
|
|
T22 |
1300 |
|
T97 |
209 |
|
T98 |
1163 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54764 |
1 |
|
|
T22 |
1870 |
|
T97 |
132 |
|
T98 |
1722 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40686 |
1 |
|
|
T22 |
1013 |
|
T97 |
289 |
|
T98 |
1238 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T22 |
54 |
|
T97 |
10 |
|
T98 |
57 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T22 |
56 |
|
T97 |
10 |
|
T98 |
57 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T22 |
53 |
|
T97 |
10 |
|
T98 |
56 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T22 |
56 |
|
T97 |
10 |
|
T98 |
57 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T22 |
53 |
|
T97 |
9 |
|
T98 |
55 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T22 |
52 |
|
T97 |
10 |
|
T98 |
57 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T22 |
51 |
|
T97 |
9 |
|
T98 |
53 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T22 |
50 |
|
T97 |
10 |
|
T98 |
56 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T22 |
50 |
|
T97 |
9 |
|
T98 |
52 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T22 |
49 |
|
T97 |
9 |
|
T98 |
54 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T22 |
49 |
|
T97 |
9 |
|
T98 |
51 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T22 |
46 |
|
T97 |
9 |
|
T98 |
53 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T22 |
49 |
|
T97 |
9 |
|
T98 |
50 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T22 |
43 |
|
T97 |
8 |
|
T98 |
53 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T22 |
49 |
|
T97 |
9 |
|
T98 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T22 |
43 |
|
T97 |
8 |
|
T98 |
53 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T22 |
49 |
|
T97 |
9 |
|
T98 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T22 |
42 |
|
T97 |
8 |
|
T98 |
50 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T22 |
48 |
|
T97 |
9 |
|
T98 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T22 |
42 |
|
T97 |
8 |
|
T98 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1190 |
1 |
|
|
T22 |
48 |
|
T97 |
9 |
|
T98 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T22 |
40 |
|
T97 |
8 |
|
T98 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1164 |
1 |
|
|
T22 |
48 |
|
T97 |
9 |
|
T98 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T22 |
40 |
|
T97 |
8 |
|
T98 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1139 |
1 |
|
|
T22 |
47 |
|
T97 |
9 |
|
T98 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1204 |
1 |
|
|
T22 |
39 |
|
T97 |
8 |
|
T98 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1103 |
1 |
|
|
T22 |
44 |
|
T97 |
9 |
|
T98 |
41 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1177 |
1 |
|
|
T22 |
39 |
|
T97 |
8 |
|
T98 |
41 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1064 |
1 |
|
|
T22 |
40 |
|
T97 |
7 |
|
T98 |
41 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1149 |
1 |
|
|
T22 |
39 |
|
T97 |
8 |
|
T98 |
40 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54132 |
1 |
|
|
T22 |
1826 |
|
T97 |
223 |
|
T98 |
2951 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42812 |
1 |
|
|
T22 |
1061 |
|
T97 |
163 |
|
T98 |
1149 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50407 |
1 |
|
|
T22 |
2047 |
|
T97 |
134 |
|
T98 |
1595 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42680 |
1 |
|
|
T22 |
2482 |
|
T97 |
773 |
|
T98 |
1159 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T22 |
45 |
|
T97 |
11 |
|
T98 |
54 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T22 |
45 |
|
T97 |
12 |
|
T98 |
55 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T22 |
41 |
|
T97 |
9 |
|
T98 |
52 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T22 |
45 |
|
T97 |
12 |
|
T98 |
53 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T22 |
39 |
|
T97 |
8 |
|
T98 |
51 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T22 |
43 |
|
T97 |
11 |
|
T98 |
53 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T22 |
39 |
|
T97 |
8 |
|
T98 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T22 |
43 |
|
T97 |
11 |
|
T98 |
51 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T22 |
38 |
|
T97 |
8 |
|
T98 |
47 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T22 |
43 |
|
T97 |
11 |
|
T98 |
50 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T22 |
36 |
|
T97 |
8 |
|
T98 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T22 |
43 |
|
T97 |
11 |
|
T98 |
50 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T22 |
35 |
|
T97 |
8 |
|
T98 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T22 |
43 |
|
T97 |
11 |
|
T98 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T22 |
34 |
|
T97 |
8 |
|
T98 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T22 |
43 |
|
T97 |
11 |
|
T98 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T22 |
32 |
|
T97 |
8 |
|
T98 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T22 |
43 |
|
T97 |
11 |
|
T98 |
46 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T22 |
30 |
|
T97 |
8 |
|
T98 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T22 |
41 |
|
T97 |
11 |
|
T98 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T22 |
29 |
|
T97 |
7 |
|
T98 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T22 |
41 |
|
T97 |
11 |
|
T98 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T22 |
28 |
|
T97 |
7 |
|
T98 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T22 |
41 |
|
T97 |
11 |
|
T98 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1187 |
1 |
|
|
T22 |
27 |
|
T97 |
7 |
|
T98 |
40 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T22 |
41 |
|
T97 |
10 |
|
T98 |
41 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1160 |
1 |
|
|
T22 |
26 |
|
T97 |
7 |
|
T98 |
40 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1129 |
1 |
|
|
T22 |
40 |
|
T97 |
9 |
|
T98 |
38 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1140 |
1 |
|
|
T22 |
26 |
|
T97 |
7 |
|
T98 |
38 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T22 |
30 |
|
T97 |
2 |
|
T98 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1099 |
1 |
|
|
T22 |
39 |
|
T97 |
8 |
|
T98 |
38 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52780 |
1 |
|
|
T22 |
1393 |
|
T97 |
178 |
|
T98 |
1689 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
38875 |
1 |
|
|
T22 |
1108 |
|
T97 |
113 |
|
T98 |
1171 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53965 |
1 |
|
|
T22 |
2279 |
|
T97 |
380 |
|
T98 |
2803 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43957 |
1 |
|
|
T22 |
2384 |
|
T97 |
712 |
|
T98 |
1108 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T22 |
58 |
|
T97 |
7 |
|
T98 |
59 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T22 |
62 |
|
T97 |
7 |
|
T98 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T22 |
57 |
|
T97 |
7 |
|
T98 |
59 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T22 |
61 |
|
T97 |
7 |
|
T98 |
53 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T22 |
56 |
|
T97 |
7 |
|
T98 |
59 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T22 |
58 |
|
T97 |
6 |
|
T98 |
52 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T22 |
54 |
|
T97 |
7 |
|
T98 |
59 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T22 |
58 |
|
T97 |
6 |
|
T98 |
52 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T22 |
53 |
|
T97 |
7 |
|
T98 |
59 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T22 |
57 |
|
T97 |
6 |
|
T98 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T22 |
52 |
|
T97 |
6 |
|
T98 |
58 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T22 |
57 |
|
T97 |
6 |
|
T98 |
49 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T22 |
51 |
|
T97 |
6 |
|
T98 |
58 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T22 |
57 |
|
T97 |
6 |
|
T98 |
49 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T22 |
51 |
|
T97 |
6 |
|
T98 |
56 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T22 |
55 |
|
T97 |
6 |
|
T98 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T22 |
50 |
|
T97 |
6 |
|
T98 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T22 |
54 |
|
T97 |
6 |
|
T98 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T22 |
48 |
|
T97 |
6 |
|
T98 |
53 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1286 |
1 |
|
|
T22 |
53 |
|
T97 |
6 |
|
T98 |
45 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T22 |
43 |
|
T97 |
5 |
|
T98 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T22 |
53 |
|
T97 |
6 |
|
T98 |
44 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T22 |
43 |
|
T97 |
4 |
|
T98 |
50 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T22 |
53 |
|
T97 |
6 |
|
T98 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1184 |
1 |
|
|
T22 |
41 |
|
T97 |
4 |
|
T98 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T22 |
53 |
|
T97 |
5 |
|
T98 |
41 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1146 |
1 |
|
|
T22 |
39 |
|
T97 |
4 |
|
T98 |
46 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1169 |
1 |
|
|
T22 |
51 |
|
T97 |
5 |
|
T98 |
39 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
22 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1105 |
1 |
|
|
T22 |
36 |
|
T97 |
4 |
|
T98 |
46 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T22 |
23 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1132 |
1 |
|
|
T22 |
50 |
|
T97 |
5 |
|
T98 |
35 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50516 |
1 |
|
|
T22 |
1274 |
|
T97 |
247 |
|
T98 |
1946 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40221 |
1 |
|
|
T22 |
1332 |
|
T97 |
171 |
|
T98 |
829 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55102 |
1 |
|
|
T22 |
2941 |
|
T97 |
718 |
|
T98 |
2188 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43479 |
1 |
|
|
T22 |
1393 |
|
T97 |
238 |
|
T98 |
2050 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T22 |
63 |
|
T97 |
6 |
|
T98 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T22 |
61 |
|
T97 |
8 |
|
T98 |
43 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T22 |
62 |
|
T97 |
6 |
|
T98 |
33 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T22 |
60 |
|
T97 |
8 |
|
T98 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T22 |
61 |
|
T97 |
6 |
|
T98 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T22 |
59 |
|
T97 |
8 |
|
T98 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T22 |
60 |
|
T97 |
6 |
|
T98 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T22 |
58 |
|
T97 |
8 |
|
T98 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T22 |
59 |
|
T97 |
6 |
|
T98 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T22 |
58 |
|
T97 |
8 |
|
T98 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T22 |
55 |
|
T97 |
6 |
|
T98 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T22 |
58 |
|
T97 |
7 |
|
T98 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T22 |
54 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T22 |
57 |
|
T97 |
7 |
|
T98 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T22 |
53 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T22 |
57 |
|
T97 |
6 |
|
T98 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T22 |
52 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T22 |
57 |
|
T97 |
6 |
|
T98 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T22 |
51 |
|
T97 |
6 |
|
T98 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T22 |
56 |
|
T97 |
6 |
|
T98 |
35 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T22 |
48 |
|
T97 |
5 |
|
T98 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T22 |
53 |
|
T97 |
6 |
|
T98 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T22 |
48 |
|
T97 |
5 |
|
T98 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T22 |
53 |
|
T97 |
6 |
|
T98 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T22 |
45 |
|
T97 |
5 |
|
T98 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1160 |
1 |
|
|
T22 |
53 |
|
T97 |
5 |
|
T98 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1168 |
1 |
|
|
T22 |
44 |
|
T97 |
5 |
|
T98 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1127 |
1 |
|
|
T22 |
52 |
|
T97 |
5 |
|
T98 |
33 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1135 |
1 |
|
|
T22 |
41 |
|
T97 |
5 |
|
T98 |
26 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T22 |
31 |
|
T97 |
2 |
|
T98 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1105 |
1 |
|
|
T22 |
50 |
|
T97 |
5 |
|
T98 |
33 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54541 |
1 |
|
|
T22 |
3333 |
|
T97 |
256 |
|
T98 |
1231 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40098 |
1 |
|
|
T22 |
1257 |
|
T97 |
180 |
|
T98 |
1580 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52082 |
1 |
|
|
T22 |
1714 |
|
T97 |
672 |
|
T98 |
2440 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43017 |
1 |
|
|
T22 |
1064 |
|
T97 |
243 |
|
T98 |
1203 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T22 |
27 |
|
T98 |
24 |
|
T99 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T22 |
49 |
|
T97 |
10 |
|
T98 |
71 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T22 |
27 |
|
T97 |
2 |
|
T98 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T22 |
49 |
|
T97 |
9 |
|
T98 |
67 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T22 |
27 |
|
T98 |
24 |
|
T99 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T22 |
48 |
|
T97 |
10 |
|
T98 |
70 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T22 |
27 |
|
T97 |
2 |
|
T98 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T22 |
48 |
|
T97 |
8 |
|
T98 |
65 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T22 |
27 |
|
T98 |
24 |
|
T99 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T22 |
46 |
|
T97 |
10 |
|
T98 |
70 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T22 |
27 |
|
T97 |
2 |
|
T98 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T22 |
47 |
|
T97 |
8 |
|
T98 |
65 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T22 |
27 |
|
T98 |
24 |
|
T99 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T22 |
45 |
|
T97 |
10 |
|
T98 |
69 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T22 |
27 |
|
T97 |
2 |
|
T98 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T22 |
46 |
|
T97 |
8 |
|
T98 |
64 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T22 |
27 |
|
T98 |
24 |
|
T99 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T22 |
45 |
|
T97 |
10 |
|
T98 |
68 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T22 |
27 |
|
T97 |
2 |
|
T98 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T22 |
45 |
|
T97 |
8 |
|
T98 |
62 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T22 |
27 |
|
T98 |
24 |
|
T99 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T22 |
44 |
|
T97 |
10 |
|
T98 |
66 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T22 |
27 |
|
T97 |
2 |
|
T98 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T22 |
45 |
|
T97 |
8 |
|
T98 |
60 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T22 |
27 |
|
T98 |
24 |
|
T99 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T22 |
42 |
|
T97 |
10 |
|
T98 |
65 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T22 |
27 |
|
T97 |
2 |
|
T98 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T22 |
44 |
|
T97 |
8 |
|
T98 |
59 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T22 |
27 |
|
T98 |
24 |
|
T99 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T22 |
42 |
|
T97 |
8 |
|
T98 |
64 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T22 |
27 |
|
T97 |
2 |
|
T98 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T22 |
44 |
|
T97 |
8 |
|
T98 |
56 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T22 |
27 |
|
T98 |
24 |
|
T99 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T22 |
41 |
|
T97 |
8 |
|
T98 |
60 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T22 |
44 |
|
T97 |
8 |
|
T98 |
55 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T22 |
27 |
|
T98 |
24 |
|
T99 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T22 |
41 |
|
T97 |
8 |
|
T98 |
58 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T22 |
43 |
|
T97 |
8 |
|
T98 |
53 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T22 |
27 |
|
T98 |
24 |
|
T99 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T22 |
40 |
|
T97 |
8 |
|
T98 |
56 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T22 |
41 |
|
T97 |
8 |
|
T98 |
52 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T22 |
27 |
|
T98 |
24 |
|
T99 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T22 |
40 |
|
T97 |
8 |
|
T98 |
55 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T22 |
40 |
|
T97 |
8 |
|
T98 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T22 |
27 |
|
T98 |
24 |
|
T99 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1190 |
1 |
|
|
T22 |
40 |
|
T97 |
8 |
|
T98 |
54 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T22 |
40 |
|
T97 |
7 |
|
T98 |
50 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T22 |
27 |
|
T98 |
24 |
|
T99 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1157 |
1 |
|
|
T22 |
40 |
|
T97 |
8 |
|
T98 |
52 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1176 |
1 |
|
|
T22 |
38 |
|
T97 |
7 |
|
T98 |
47 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T22 |
27 |
|
T98 |
24 |
|
T99 |
9 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1123 |
1 |
|
|
T22 |
38 |
|
T97 |
8 |
|
T98 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T22 |
26 |
|
T97 |
2 |
|
T98 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1146 |
1 |
|
|
T22 |
37 |
|
T97 |
7 |
|
T98 |
47 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57602 |
1 |
|
|
T22 |
1905 |
|
T97 |
143 |
|
T98 |
2130 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42118 |
1 |
|
|
T22 |
1211 |
|
T97 |
138 |
|
T98 |
1874 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
48699 |
1 |
|
|
T22 |
2902 |
|
T97 |
476 |
|
T98 |
1775 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41636 |
1 |
|
|
T22 |
1221 |
|
T97 |
649 |
|
T98 |
1090 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T22 |
51 |
|
T97 |
6 |
|
T98 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T22 |
29 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T22 |
51 |
|
T97 |
5 |
|
T98 |
48 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T22 |
51 |
|
T97 |
6 |
|
T98 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T22 |
29 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T22 |
51 |
|
T97 |
5 |
|
T98 |
48 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T22 |
49 |
|
T97 |
5 |
|
T98 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T22 |
29 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T22 |
51 |
|
T97 |
5 |
|
T98 |
47 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T22 |
49 |
|
T97 |
5 |
|
T98 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T22 |
29 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T22 |
49 |
|
T97 |
5 |
|
T98 |
47 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T22 |
49 |
|
T97 |
5 |
|
T98 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T22 |
29 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T22 |
48 |
|
T97 |
5 |
|
T98 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T22 |
48 |
|
T97 |
5 |
|
T98 |
36 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T22 |
29 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T22 |
48 |
|
T97 |
5 |
|
T98 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T22 |
48 |
|
T97 |
5 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T22 |
29 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T22 |
45 |
|
T97 |
5 |
|
T98 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T22 |
45 |
|
T97 |
5 |
|
T98 |
34 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T22 |
29 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T22 |
43 |
|
T97 |
4 |
|
T98 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T22 |
45 |
|
T97 |
4 |
|
T98 |
34 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T22 |
29 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T22 |
43 |
|
T97 |
4 |
|
T98 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T22 |
43 |
|
T97 |
4 |
|
T98 |
33 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T22 |
29 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T22 |
43 |
|
T97 |
4 |
|
T98 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T22 |
43 |
|
T97 |
4 |
|
T98 |
32 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T22 |
29 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T22 |
43 |
|
T97 |
4 |
|
T98 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T22 |
43 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T22 |
29 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T22 |
43 |
|
T97 |
4 |
|
T98 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1161 |
1 |
|
|
T22 |
42 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T22 |
29 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1174 |
1 |
|
|
T22 |
43 |
|
T97 |
4 |
|
T98 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1138 |
1 |
|
|
T22 |
39 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T22 |
29 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1143 |
1 |
|
|
T22 |
42 |
|
T97 |
4 |
|
T98 |
38 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T22 |
28 |
|
T97 |
2 |
|
T98 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1101 |
1 |
|
|
T22 |
39 |
|
T97 |
4 |
|
T98 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T22 |
29 |
|
T97 |
4 |
|
T98 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1120 |
1 |
|
|
T22 |
42 |
|
T97 |
4 |
|
T98 |
38 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54672 |
1 |
|
|
T22 |
1954 |
|
T97 |
949 |
|
T98 |
2469 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44601 |
1 |
|
|
T22 |
1290 |
|
T97 |
134 |
|
T98 |
1091 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52368 |
1 |
|
|
T22 |
2752 |
|
T97 |
144 |
|
T98 |
1513 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
38280 |
1 |
|
|
T22 |
1259 |
|
T97 |
118 |
|
T98 |
1574 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
27 |
|
T97 |
5 |
|
T98 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T22 |
53 |
|
T97 |
5 |
|
T98 |
59 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T22 |
59 |
|
T97 |
7 |
|
T98 |
66 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T22 |
27 |
|
T97 |
5 |
|
T98 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T22 |
52 |
|
T97 |
5 |
|
T98 |
58 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T22 |
58 |
|
T97 |
7 |
|
T98 |
64 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T22 |
27 |
|
T97 |
5 |
|
T98 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T22 |
50 |
|
T97 |
5 |
|
T98 |
55 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T22 |
56 |
|
T97 |
7 |
|
T98 |
64 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T22 |
27 |
|
T97 |
5 |
|
T98 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T22 |
50 |
|
T97 |
5 |
|
T98 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T22 |
53 |
|
T97 |
7 |
|
T98 |
63 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T22 |
27 |
|
T97 |
5 |
|
T98 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T22 |
50 |
|
T97 |
5 |
|
T98 |
50 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T22 |
53 |
|
T97 |
7 |
|
T98 |
62 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T22 |
27 |
|
T97 |
5 |
|
T98 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T22 |
49 |
|
T97 |
5 |
|
T98 |
50 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T22 |
51 |
|
T97 |
7 |
|
T98 |
61 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T22 |
27 |
|
T97 |
5 |
|
T98 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T22 |
49 |
|
T97 |
5 |
|
T98 |
50 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T22 |
51 |
|
T97 |
7 |
|
T98 |
58 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T22 |
27 |
|
T97 |
5 |
|
T98 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T22 |
48 |
|
T97 |
5 |
|
T98 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T22 |
22 |
|
T97 |
3 |
|
T98 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T22 |
51 |
|
T97 |
7 |
|
T98 |
58 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T22 |
27 |
|
T97 |
5 |
|
T98 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T22 |
48 |
|
T97 |
4 |
|
T98 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T22 |
21 |
|
T97 |
3 |
|
T98 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T22 |
51 |
|
T97 |
7 |
|
T98 |
56 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T22 |
27 |
|
T97 |
5 |
|
T98 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T22 |
48 |
|
T97 |
4 |
|
T98 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T22 |
21 |
|
T97 |
3 |
|
T98 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T22 |
50 |
|
T97 |
7 |
|
T98 |
55 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T22 |
27 |
|
T97 |
5 |
|
T98 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T22 |
48 |
|
T97 |
4 |
|
T98 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T22 |
21 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T22 |
48 |
|
T97 |
7 |
|
T98 |
54 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T22 |
27 |
|
T97 |
5 |
|
T98 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1187 |
1 |
|
|
T22 |
47 |
|
T97 |
4 |
|
T98 |
41 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T22 |
21 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T22 |
44 |
|
T97 |
7 |
|
T98 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T22 |
27 |
|
T97 |
5 |
|
T98 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1150 |
1 |
|
|
T22 |
46 |
|
T97 |
4 |
|
T98 |
39 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T22 |
21 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1167 |
1 |
|
|
T22 |
44 |
|
T97 |
7 |
|
T98 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T22 |
27 |
|
T97 |
5 |
|
T98 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1126 |
1 |
|
|
T22 |
46 |
|
T97 |
4 |
|
T98 |
38 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T22 |
21 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1142 |
1 |
|
|
T22 |
43 |
|
T97 |
7 |
|
T98 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T22 |
27 |
|
T97 |
5 |
|
T98 |
30 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1090 |
1 |
|
|
T22 |
43 |
|
T97 |
4 |
|
T98 |
38 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T22 |
21 |
|
T97 |
2 |
|
T98 |
23 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1114 |
1 |
|
|
T22 |
41 |
|
T97 |
7 |
|
T98 |
51 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51776 |
1 |
|
|
T22 |
2707 |
|
T97 |
382 |
|
T98 |
2890 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41318 |
1 |
|
|
T22 |
1409 |
|
T97 |
46 |
|
T98 |
1375 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52435 |
1 |
|
|
T22 |
1805 |
|
T97 |
277 |
|
T98 |
1561 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44041 |
1 |
|
|
T22 |
1243 |
|
T97 |
653 |
|
T98 |
1091 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T22 |
21 |
|
T97 |
8 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T22 |
65 |
|
T97 |
1 |
|
T98 |
53 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T22 |
20 |
|
T97 |
7 |
|
T98 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T22 |
66 |
|
T97 |
3 |
|
T98 |
52 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T22 |
21 |
|
T97 |
8 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T22 |
65 |
|
T97 |
1 |
|
T98 |
52 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T22 |
20 |
|
T97 |
7 |
|
T98 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T22 |
65 |
|
T97 |
3 |
|
T98 |
50 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T22 |
21 |
|
T97 |
8 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T22 |
64 |
|
T97 |
1 |
|
T98 |
50 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T22 |
20 |
|
T97 |
7 |
|
T98 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T22 |
64 |
|
T97 |
3 |
|
T98 |
49 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T22 |
21 |
|
T97 |
8 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T22 |
61 |
|
T97 |
1 |
|
T98 |
47 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T22 |
20 |
|
T97 |
7 |
|
T98 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T22 |
64 |
|
T97 |
3 |
|
T98 |
46 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T22 |
21 |
|
T97 |
8 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T22 |
60 |
|
T97 |
1 |
|
T98 |
45 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T22 |
20 |
|
T97 |
7 |
|
T98 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T22 |
62 |
|
T97 |
3 |
|
T98 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T22 |
21 |
|
T97 |
8 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T22 |
60 |
|
T98 |
44 |
|
T99 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T22 |
20 |
|
T97 |
7 |
|
T98 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T22 |
60 |
|
T97 |
3 |
|
T98 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T22 |
21 |
|
T97 |
8 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T22 |
58 |
|
T98 |
43 |
|
T99 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T22 |
20 |
|
T97 |
7 |
|
T98 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T22 |
57 |
|
T97 |
3 |
|
T98 |
39 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T22 |
21 |
|
T97 |
8 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T22 |
58 |
|
T98 |
42 |
|
T99 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T22 |
20 |
|
T97 |
7 |
|
T98 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T22 |
54 |
|
T97 |
3 |
|
T98 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T22 |
21 |
|
T97 |
8 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T22 |
58 |
|
T98 |
41 |
|
T99 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T22 |
19 |
|
T97 |
7 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T22 |
52 |
|
T97 |
3 |
|
T98 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T22 |
21 |
|
T97 |
8 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T22 |
57 |
|
T98 |
41 |
|
T99 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T22 |
19 |
|
T97 |
7 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T22 |
50 |
|
T97 |
3 |
|
T98 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T22 |
21 |
|
T97 |
8 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T22 |
52 |
|
T98 |
39 |
|
T99 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T22 |
19 |
|
T97 |
7 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T22 |
49 |
|
T97 |
3 |
|
T98 |
37 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T22 |
21 |
|
T97 |
8 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T22 |
51 |
|
T98 |
39 |
|
T99 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T22 |
19 |
|
T97 |
7 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1206 |
1 |
|
|
T22 |
49 |
|
T97 |
3 |
|
T98 |
36 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T22 |
21 |
|
T97 |
8 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T22 |
51 |
|
T98 |
38 |
|
T99 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T22 |
19 |
|
T97 |
7 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1171 |
1 |
|
|
T22 |
47 |
|
T97 |
3 |
|
T98 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T22 |
21 |
|
T97 |
8 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T22 |
50 |
|
T98 |
38 |
|
T99 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T22 |
19 |
|
T97 |
7 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1144 |
1 |
|
|
T22 |
47 |
|
T97 |
3 |
|
T98 |
35 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T22 |
21 |
|
T97 |
8 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1145 |
1 |
|
|
T22 |
50 |
|
T98 |
37 |
|
T99 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T22 |
19 |
|
T97 |
7 |
|
T98 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1108 |
1 |
|
|
T22 |
45 |
|
T97 |
3 |
|
T98 |
34 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
43867 |
1 |
|
|
T22 |
2989 |
|
T97 |
806 |
|
T98 |
1331 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48918 |
1 |
|
|
T22 |
1353 |
|
T97 |
30 |
|
T98 |
2221 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55169 |
1 |
|
|
T22 |
1639 |
|
T97 |
381 |
|
T98 |
1655 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42145 |
1 |
|
|
T22 |
1157 |
|
T97 |
162 |
|
T98 |
1541 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T22 |
21 |
|
T97 |
6 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T22 |
64 |
|
T97 |
3 |
|
T98 |
65 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T22 |
28 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T22 |
57 |
|
T97 |
5 |
|
T98 |
64 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T22 |
21 |
|
T97 |
6 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T22 |
63 |
|
T97 |
3 |
|
T98 |
65 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
628 |
1 |
|
|
T22 |
28 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T22 |
56 |
|
T97 |
5 |
|
T98 |
64 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T22 |
21 |
|
T97 |
6 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T22 |
63 |
|
T97 |
3 |
|
T98 |
64 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T22 |
28 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T22 |
54 |
|
T97 |
5 |
|
T98 |
61 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
623 |
1 |
|
|
T22 |
21 |
|
T97 |
6 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T22 |
62 |
|
T97 |
3 |
|
T98 |
58 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
627 |
1 |
|
|
T22 |
28 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T22 |
52 |
|
T97 |
5 |
|
T98 |
59 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T22 |
21 |
|
T97 |
6 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T22 |
61 |
|
T97 |
3 |
|
T98 |
57 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T22 |
28 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T22 |
50 |
|
T97 |
5 |
|
T98 |
58 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
621 |
1 |
|
|
T22 |
21 |
|
T97 |
6 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T22 |
60 |
|
T97 |
3 |
|
T98 |
54 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T22 |
28 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T22 |
50 |
|
T97 |
5 |
|
T98 |
58 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T22 |
21 |
|
T97 |
6 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T22 |
60 |
|
T97 |
3 |
|
T98 |
53 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T22 |
28 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T22 |
50 |
|
T97 |
5 |
|
T98 |
58 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
615 |
1 |
|
|
T22 |
21 |
|
T97 |
6 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T22 |
60 |
|
T97 |
3 |
|
T98 |
51 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
619 |
1 |
|
|
T22 |
28 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T22 |
50 |
|
T97 |
5 |
|
T98 |
58 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T22 |
21 |
|
T97 |
6 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T22 |
59 |
|
T97 |
3 |
|
T98 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T22 |
28 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T22 |
49 |
|
T97 |
5 |
|
T98 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
611 |
1 |
|
|
T22 |
21 |
|
T97 |
6 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T22 |
54 |
|
T97 |
3 |
|
T98 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
616 |
1 |
|
|
T22 |
28 |
|
T97 |
4 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T22 |
47 |
|
T97 |
4 |
|
T98 |
55 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
609 |
1 |
|
|
T22 |
21 |
|
T97 |
6 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T22 |
53 |
|
T97 |
3 |
|
T98 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T22 |
46 |
|
T97 |
4 |
|
T98 |
54 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
609 |
1 |
|
|
T22 |
21 |
|
T97 |
6 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T22 |
51 |
|
T97 |
3 |
|
T98 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T22 |
46 |
|
T97 |
4 |
|
T98 |
54 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
609 |
1 |
|
|
T22 |
21 |
|
T97 |
6 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T22 |
50 |
|
T97 |
2 |
|
T98 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
612 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T22 |
44 |
|
T97 |
4 |
|
T98 |
53 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
609 |
1 |
|
|
T22 |
21 |
|
T97 |
6 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1173 |
1 |
|
|
T22 |
49 |
|
T97 |
1 |
|
T98 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
612 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1183 |
1 |
|
|
T22 |
43 |
|
T97 |
4 |
|
T98 |
52 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
609 |
1 |
|
|
T22 |
21 |
|
T97 |
6 |
|
T98 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1142 |
1 |
|
|
T22 |
47 |
|
T97 |
1 |
|
T98 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
612 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
22 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1153 |
1 |
|
|
T22 |
40 |
|
T97 |
4 |
|
T98 |
50 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54730 |
1 |
|
|
T22 |
3484 |
|
T97 |
680 |
|
T98 |
1089 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42608 |
1 |
|
|
T22 |
1057 |
|
T97 |
146 |
|
T98 |
2268 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50377 |
1 |
|
|
T22 |
1446 |
|
T97 |
242 |
|
T98 |
1746 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42524 |
1 |
|
|
T22 |
1292 |
|
T97 |
259 |
|
T98 |
1524 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T22 |
24 |
|
T97 |
2 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T22 |
56 |
|
T97 |
10 |
|
T98 |
71 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T22 |
55 |
|
T97 |
9 |
|
T98 |
67 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T22 |
24 |
|
T97 |
2 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T22 |
53 |
|
T97 |
9 |
|
T98 |
68 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T22 |
54 |
|
T97 |
9 |
|
T98 |
67 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T22 |
24 |
|
T97 |
2 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T22 |
52 |
|
T97 |
9 |
|
T98 |
66 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T22 |
54 |
|
T97 |
9 |
|
T98 |
67 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T22 |
24 |
|
T97 |
2 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T22 |
52 |
|
T97 |
9 |
|
T98 |
65 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T22 |
54 |
|
T97 |
9 |
|
T98 |
65 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T22 |
24 |
|
T97 |
2 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T22 |
51 |
|
T97 |
8 |
|
T98 |
62 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T22 |
52 |
|
T97 |
8 |
|
T98 |
63 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T22 |
24 |
|
T97 |
2 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T22 |
50 |
|
T97 |
8 |
|
T98 |
61 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T22 |
51 |
|
T97 |
8 |
|
T98 |
60 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T22 |
24 |
|
T97 |
2 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T22 |
49 |
|
T97 |
8 |
|
T98 |
58 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T22 |
51 |
|
T97 |
8 |
|
T98 |
59 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T22 |
24 |
|
T97 |
2 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T22 |
48 |
|
T97 |
7 |
|
T98 |
58 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T22 |
25 |
|
T97 |
3 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T22 |
51 |
|
T97 |
8 |
|
T98 |
59 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T22 |
24 |
|
T97 |
2 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T22 |
47 |
|
T97 |
7 |
|
T98 |
57 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T22 |
24 |
|
T97 |
3 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T22 |
49 |
|
T97 |
7 |
|
T98 |
58 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T22 |
24 |
|
T97 |
2 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T22 |
46 |
|
T97 |
7 |
|
T98 |
55 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T22 |
24 |
|
T97 |
3 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T22 |
48 |
|
T97 |
7 |
|
T98 |
58 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T22 |
24 |
|
T97 |
2 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1218 |
1 |
|
|
T22 |
44 |
|
T97 |
7 |
|
T98 |
55 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T22 |
24 |
|
T97 |
3 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T22 |
48 |
|
T97 |
7 |
|
T98 |
58 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T22 |
24 |
|
T97 |
2 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T22 |
44 |
|
T97 |
7 |
|
T98 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T22 |
24 |
|
T97 |
3 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T22 |
46 |
|
T97 |
7 |
|
T98 |
57 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T22 |
24 |
|
T97 |
2 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T22 |
39 |
|
T97 |
6 |
|
T98 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T22 |
24 |
|
T97 |
3 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1159 |
1 |
|
|
T22 |
46 |
|
T97 |
7 |
|
T98 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T22 |
24 |
|
T97 |
2 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1127 |
1 |
|
|
T22 |
39 |
|
T97 |
6 |
|
T98 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T22 |
24 |
|
T97 |
3 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1125 |
1 |
|
|
T22 |
45 |
|
T97 |
7 |
|
T98 |
52 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T22 |
24 |
|
T97 |
2 |
|
T98 |
19 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1102 |
1 |
|
|
T22 |
37 |
|
T97 |
6 |
|
T98 |
50 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T22 |
24 |
|
T97 |
3 |
|
T98 |
22 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1087 |
1 |
|
|
T22 |
45 |
|
T97 |
7 |
|
T98 |
51 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51264 |
1 |
|
|
T22 |
1777 |
|
T97 |
418 |
|
T98 |
1554 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42364 |
1 |
|
|
T22 |
1223 |
|
T97 |
90 |
|
T98 |
2223 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51661 |
1 |
|
|
T22 |
3093 |
|
T97 |
766 |
|
T98 |
1597 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44487 |
1 |
|
|
T22 |
1237 |
|
T97 |
110 |
|
T98 |
1445 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T22 |
50 |
|
T97 |
2 |
|
T98 |
56 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T22 |
26 |
|
T97 |
7 |
|
T98 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T22 |
51 |
|
T97 |
2 |
|
T98 |
57 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T22 |
50 |
|
T97 |
2 |
|
T98 |
55 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T22 |
26 |
|
T97 |
7 |
|
T98 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T22 |
50 |
|
T97 |
2 |
|
T98 |
57 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T22 |
48 |
|
T97 |
2 |
|
T98 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T22 |
26 |
|
T97 |
7 |
|
T98 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T22 |
50 |
|
T97 |
2 |
|
T98 |
57 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T22 |
46 |
|
T97 |
2 |
|
T98 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T22 |
26 |
|
T97 |
7 |
|
T98 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T22 |
49 |
|
T97 |
2 |
|
T98 |
56 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T22 |
45 |
|
T97 |
2 |
|
T98 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T22 |
26 |
|
T97 |
7 |
|
T98 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T22 |
49 |
|
T97 |
2 |
|
T98 |
54 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T22 |
45 |
|
T97 |
2 |
|
T98 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T22 |
26 |
|
T97 |
7 |
|
T98 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T22 |
49 |
|
T97 |
2 |
|
T98 |
51 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T22 |
45 |
|
T97 |
2 |
|
T98 |
52 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T22 |
26 |
|
T97 |
7 |
|
T98 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T22 |
48 |
|
T97 |
2 |
|
T98 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T22 |
45 |
|
T97 |
2 |
|
T98 |
51 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T22 |
26 |
|
T97 |
7 |
|
T98 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T22 |
46 |
|
T97 |
2 |
|
T98 |
49 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T22 |
45 |
|
T97 |
2 |
|
T98 |
51 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T22 |
25 |
|
T97 |
7 |
|
T98 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T22 |
46 |
|
T97 |
2 |
|
T98 |
48 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T22 |
45 |
|
T97 |
2 |
|
T98 |
51 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T22 |
25 |
|
T97 |
7 |
|
T98 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T22 |
46 |
|
T97 |
1 |
|
T98 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T22 |
43 |
|
T97 |
2 |
|
T98 |
47 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T22 |
25 |
|
T97 |
7 |
|
T98 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T22 |
44 |
|
T97 |
1 |
|
T98 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T22 |
41 |
|
T97 |
2 |
|
T98 |
45 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T22 |
25 |
|
T97 |
7 |
|
T98 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T22 |
42 |
|
T97 |
1 |
|
T98 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1154 |
1 |
|
|
T22 |
40 |
|
T97 |
2 |
|
T98 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T22 |
25 |
|
T97 |
7 |
|
T98 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1176 |
1 |
|
|
T22 |
42 |
|
T97 |
1 |
|
T98 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1125 |
1 |
|
|
T22 |
40 |
|
T97 |
2 |
|
T98 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T22 |
25 |
|
T97 |
7 |
|
T98 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1137 |
1 |
|
|
T22 |
41 |
|
T97 |
1 |
|
T98 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
26 |
|
T97 |
6 |
|
T98 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1096 |
1 |
|
|
T22 |
39 |
|
T97 |
2 |
|
T98 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T22 |
25 |
|
T97 |
7 |
|
T98 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1114 |
1 |
|
|
T22 |
40 |
|
T97 |
1 |
|
T98 |
40 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51484 |
1 |
|
|
T22 |
1408 |
|
T97 |
366 |
|
T98 |
1989 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43643 |
1 |
|
|
T22 |
1222 |
|
T97 |
80 |
|
T98 |
2564 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51311 |
1 |
|
|
T22 |
1267 |
|
T97 |
739 |
|
T98 |
723 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43190 |
1 |
|
|
T22 |
2981 |
|
T97 |
162 |
|
T98 |
1551 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T22 |
77 |
|
T97 |
6 |
|
T98 |
64 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T22 |
30 |
|
T97 |
6 |
|
T98 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T22 |
71 |
|
T97 |
5 |
|
T98 |
68 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T22 |
75 |
|
T97 |
6 |
|
T98 |
64 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T22 |
30 |
|
T97 |
6 |
|
T98 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T22 |
68 |
|
T97 |
5 |
|
T98 |
68 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T22 |
74 |
|
T97 |
6 |
|
T98 |
62 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T22 |
30 |
|
T97 |
6 |
|
T98 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T22 |
64 |
|
T97 |
5 |
|
T98 |
66 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T22 |
73 |
|
T97 |
6 |
|
T98 |
61 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T22 |
30 |
|
T97 |
6 |
|
T98 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T22 |
62 |
|
T97 |
5 |
|
T98 |
66 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T22 |
70 |
|
T97 |
5 |
|
T98 |
60 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T22 |
30 |
|
T97 |
6 |
|
T98 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T22 |
61 |
|
T97 |
5 |
|
T98 |
65 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T22 |
64 |
|
T97 |
5 |
|
T98 |
59 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T22 |
30 |
|
T97 |
6 |
|
T98 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T22 |
59 |
|
T97 |
5 |
|
T98 |
62 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T22 |
61 |
|
T97 |
4 |
|
T98 |
59 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T22 |
30 |
|
T97 |
6 |
|
T98 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T22 |
56 |
|
T97 |
4 |
|
T98 |
60 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T22 |
59 |
|
T97 |
4 |
|
T98 |
57 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T22 |
30 |
|
T97 |
6 |
|
T98 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T22 |
56 |
|
T97 |
4 |
|
T98 |
59 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T22 |
57 |
|
T97 |
4 |
|
T98 |
57 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T22 |
29 |
|
T97 |
6 |
|
T98 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T22 |
56 |
|
T97 |
4 |
|
T98 |
56 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T22 |
57 |
|
T97 |
4 |
|
T98 |
57 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T22 |
29 |
|
T97 |
6 |
|
T98 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T22 |
55 |
|
T97 |
4 |
|
T98 |
53 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T22 |
56 |
|
T97 |
4 |
|
T98 |
57 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T22 |
29 |
|
T97 |
6 |
|
T98 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T22 |
54 |
|
T97 |
4 |
|
T98 |
52 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
637 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T22 |
55 |
|
T97 |
4 |
|
T98 |
57 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T22 |
29 |
|
T97 |
6 |
|
T98 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T22 |
52 |
|
T97 |
4 |
|
T98 |
52 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T22 |
54 |
|
T97 |
4 |
|
T98 |
56 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T22 |
29 |
|
T97 |
6 |
|
T98 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T22 |
52 |
|
T97 |
4 |
|
T98 |
52 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1149 |
1 |
|
|
T22 |
52 |
|
T97 |
4 |
|
T98 |
55 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T22 |
29 |
|
T97 |
6 |
|
T98 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T22 |
50 |
|
T97 |
4 |
|
T98 |
51 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T22 |
23 |
|
T97 |
4 |
|
T98 |
17 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1112 |
1 |
|
|
T22 |
50 |
|
T97 |
4 |
|
T98 |
52 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T22 |
29 |
|
T97 |
6 |
|
T98 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1137 |
1 |
|
|
T22 |
47 |
|
T97 |
4 |
|
T98 |
51 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52457 |
1 |
|
|
T22 |
1692 |
|
T97 |
94 |
|
T98 |
2004 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43243 |
1 |
|
|
T22 |
1031 |
|
T97 |
234 |
|
T98 |
906 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56949 |
1 |
|
|
T22 |
3052 |
|
T97 |
731 |
|
T98 |
2755 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
38862 |
1 |
|
|
T22 |
1375 |
|
T97 |
188 |
|
T98 |
1221 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T22 |
57 |
|
T97 |
9 |
|
T98 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
32 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T22 |
59 |
|
T97 |
9 |
|
T98 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T22 |
55 |
|
T97 |
9 |
|
T98 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
32 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T22 |
58 |
|
T97 |
9 |
|
T98 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T22 |
54 |
|
T97 |
9 |
|
T98 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
32 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T22 |
56 |
|
T97 |
9 |
|
T98 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T22 |
54 |
|
T97 |
9 |
|
T98 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
32 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T22 |
56 |
|
T97 |
9 |
|
T98 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T22 |
54 |
|
T97 |
9 |
|
T98 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T22 |
55 |
|
T97 |
9 |
|
T98 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T22 |
53 |
|
T97 |
9 |
|
T98 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T22 |
54 |
|
T97 |
9 |
|
T98 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T22 |
49 |
|
T97 |
9 |
|
T98 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T22 |
54 |
|
T97 |
9 |
|
T98 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T22 |
48 |
|
T97 |
9 |
|
T98 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T22 |
26 |
|
T97 |
5 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T22 |
53 |
|
T97 |
9 |
|
T98 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T22 |
46 |
|
T97 |
8 |
|
T98 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T22 |
25 |
|
T97 |
5 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T22 |
53 |
|
T97 |
8 |
|
T98 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T22 |
46 |
|
T97 |
8 |
|
T98 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T22 |
25 |
|
T97 |
5 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1189 |
1 |
|
|
T22 |
53 |
|
T97 |
8 |
|
T98 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T22 |
46 |
|
T97 |
8 |
|
T98 |
36 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T22 |
25 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1163 |
1 |
|
|
T22 |
52 |
|
T97 |
8 |
|
T98 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1176 |
1 |
|
|
T22 |
44 |
|
T97 |
8 |
|
T98 |
34 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T22 |
25 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1132 |
1 |
|
|
T22 |
51 |
|
T97 |
8 |
|
T98 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1146 |
1 |
|
|
T22 |
41 |
|
T97 |
8 |
|
T98 |
34 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T22 |
25 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1101 |
1 |
|
|
T22 |
50 |
|
T97 |
8 |
|
T98 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1122 |
1 |
|
|
T22 |
37 |
|
T97 |
8 |
|
T98 |
33 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T22 |
25 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1077 |
1 |
|
|
T22 |
50 |
|
T97 |
8 |
|
T98 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T22 |
27 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1087 |
1 |
|
|
T22 |
37 |
|
T97 |
8 |
|
T98 |
30 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T22 |
25 |
|
T97 |
4 |
|
T98 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1051 |
1 |
|
|
T22 |
50 |
|
T97 |
8 |
|
T98 |
38 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54358 |
1 |
|
|
T22 |
1653 |
|
T97 |
899 |
|
T98 |
1732 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41751 |
1 |
|
|
T22 |
942 |
|
T97 |
219 |
|
T98 |
2130 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51199 |
1 |
|
|
T22 |
2178 |
|
T97 |
163 |
|
T98 |
1624 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43225 |
1 |
|
|
T22 |
2652 |
|
T97 |
76 |
|
T98 |
1357 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T22 |
52 |
|
T97 |
7 |
|
T98 |
51 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T22 |
47 |
|
T97 |
8 |
|
T98 |
52 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T22 |
50 |
|
T97 |
6 |
|
T98 |
50 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T22 |
47 |
|
T97 |
8 |
|
T98 |
51 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T22 |
48 |
|
T97 |
6 |
|
T98 |
50 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T22 |
47 |
|
T97 |
7 |
|
T98 |
50 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T22 |
47 |
|
T97 |
6 |
|
T98 |
49 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
28 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T22 |
46 |
|
T97 |
6 |
|
T98 |
49 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T22 |
47 |
|
T97 |
6 |
|
T98 |
47 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T22 |
45 |
|
T97 |
6 |
|
T98 |
48 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T22 |
45 |
|
T97 |
6 |
|
T98 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T22 |
44 |
|
T97 |
6 |
|
T98 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T22 |
44 |
|
T97 |
6 |
|
T98 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T22 |
44 |
|
T97 |
6 |
|
T98 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T22 |
44 |
|
T97 |
6 |
|
T98 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T22 |
28 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T22 |
42 |
|
T97 |
5 |
|
T98 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1228 |
1 |
|
|
T22 |
41 |
|
T97 |
6 |
|
T98 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T22 |
27 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T22 |
42 |
|
T97 |
5 |
|
T98 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1201 |
1 |
|
|
T22 |
41 |
|
T97 |
6 |
|
T98 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T22 |
27 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T22 |
42 |
|
T97 |
4 |
|
T98 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T22 |
40 |
|
T97 |
6 |
|
T98 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T22 |
27 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T22 |
42 |
|
T97 |
4 |
|
T98 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1143 |
1 |
|
|
T22 |
40 |
|
T97 |
6 |
|
T98 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T22 |
27 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T22 |
40 |
|
T97 |
4 |
|
T98 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1108 |
1 |
|
|
T22 |
40 |
|
T97 |
6 |
|
T98 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T22 |
27 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1120 |
1 |
|
|
T22 |
38 |
|
T97 |
4 |
|
T98 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1080 |
1 |
|
|
T22 |
39 |
|
T97 |
6 |
|
T98 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T22 |
27 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1097 |
1 |
|
|
T22 |
37 |
|
T97 |
4 |
|
T98 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T22 |
22 |
|
T97 |
4 |
|
T98 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1044 |
1 |
|
|
T22 |
37 |
|
T97 |
6 |
|
T98 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T22 |
27 |
|
T97 |
3 |
|
T98 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1066 |
1 |
|
|
T22 |
37 |
|
T97 |
3 |
|
T98 |
40 |