Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7439100 |
1 |
|
|
T21 |
137 |
|
T1 |
57394 |
|
T11 |
421 |
auto[1] |
5511511 |
1 |
|
|
T1 |
46222 |
|
T16 |
1740 |
|
T17 |
56 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
10668449 |
1 |
|
|
T21 |
137 |
|
T1 |
77506 |
|
T11 |
421 |
auto[1] |
2282162 |
1 |
|
|
T1 |
26110 |
|
T13 |
7 |
|
T16 |
838 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7451537 |
1 |
|
|
T21 |
137 |
|
T1 |
59311 |
|
T11 |
421 |
auto[1] |
5499074 |
1 |
|
|
T1 |
44305 |
|
T13 |
12 |
|
T16 |
1734 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
1616437 |
1 |
|
|
T1 |
9198 |
|
T13 |
5 |
|
T16 |
369 |
auto[1] |
auto[0] |
auto[1] |
1149107 |
1 |
|
|
T1 |
13232 |
|
T13 |
7 |
|
T16 |
354 |
auto[1] |
auto[1] |
auto[0] |
1600475 |
1 |
|
|
T1 |
8997 |
|
T16 |
527 |
|
T17 |
12 |
auto[1] |
auto[1] |
auto[1] |
1133055 |
1 |
|
|
T1 |
12878 |
|
T16 |
484 |
|
T17 |
13 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |