Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7447400 |
1 |
|
|
T21 |
137 |
|
T1 |
56356 |
|
T11 |
421 |
| auto[1] |
5503211 |
1 |
|
|
T1 |
47260 |
|
T16 |
1329 |
|
T17 |
34 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10678465 |
1 |
|
|
T21 |
137 |
|
T1 |
77009 |
|
T11 |
421 |
| auto[1] |
2272146 |
1 |
|
|
T1 |
26607 |
|
T13 |
2 |
|
T16 |
790 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7470555 |
1 |
|
|
T21 |
137 |
|
T1 |
58329 |
|
T11 |
421 |
| auto[1] |
5480056 |
1 |
|
|
T1 |
45287 |
|
T13 |
8 |
|
T16 |
1499 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1612746 |
1 |
|
|
T1 |
9091 |
|
T13 |
6 |
|
T16 |
392 |
| auto[1] |
auto[0] |
auto[1] |
1141637 |
1 |
|
|
T1 |
12756 |
|
T13 |
2 |
|
T16 |
432 |
| auto[1] |
auto[1] |
auto[0] |
1595164 |
1 |
|
|
T1 |
9589 |
|
T16 |
317 |
|
T17 |
12 |
| auto[1] |
auto[1] |
auto[1] |
1130509 |
1 |
|
|
T1 |
13851 |
|
T16 |
358 |
|
T17 |
5 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |