Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8169797 |
1 |
|
|
T32 |
60557 |
|
T33 |
341 |
|
T1 |
25 |
| auto[1] |
5895175 |
1 |
|
|
T32 |
46993 |
|
T1 |
4 |
|
T11 |
42220 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11722635 |
1 |
|
|
T32 |
88871 |
|
T33 |
341 |
|
T1 |
26 |
| auto[1] |
2342337 |
1 |
|
|
T32 |
18679 |
|
T1 |
3 |
|
T11 |
16056 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8187236 |
1 |
|
|
T32 |
59491 |
|
T33 |
341 |
|
T1 |
22 |
| auto[1] |
5877736 |
1 |
|
|
T32 |
48059 |
|
T1 |
7 |
|
T11 |
41114 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1746055 |
1 |
|
|
T32 |
14726 |
|
T1 |
4 |
|
T11 |
12369 |
| auto[1] |
auto[0] |
auto[1] |
1160984 |
1 |
|
|
T32 |
9445 |
|
T1 |
1 |
|
T11 |
7778 |
| auto[1] |
auto[1] |
auto[0] |
1789344 |
1 |
|
|
T32 |
14654 |
|
T11 |
12689 |
|
T12 |
2106 |
| auto[1] |
auto[1] |
auto[1] |
1181353 |
1 |
|
|
T32 |
9234 |
|
T1 |
2 |
|
T11 |
8278 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |