Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8183350 |
1 |
|
|
T32 |
60677 |
|
T33 |
341 |
|
T1 |
25 |
| auto[1] |
5881622 |
1 |
|
|
T32 |
46873 |
|
T1 |
4 |
|
T11 |
41757 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11709897 |
1 |
|
|
T32 |
89775 |
|
T33 |
341 |
|
T1 |
25 |
| auto[1] |
2355075 |
1 |
|
|
T32 |
17775 |
|
T1 |
4 |
|
T11 |
16211 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8142866 |
1 |
|
|
T32 |
61168 |
|
T33 |
341 |
|
T1 |
25 |
| auto[1] |
5922106 |
1 |
|
|
T32 |
46382 |
|
T1 |
4 |
|
T11 |
41956 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1785329 |
1 |
|
|
T32 |
14804 |
|
T11 |
12967 |
|
T12 |
2139 |
| auto[1] |
auto[0] |
auto[1] |
1180743 |
1 |
|
|
T32 |
8850 |
|
T1 |
2 |
|
T11 |
7862 |
| auto[1] |
auto[1] |
auto[0] |
1781702 |
1 |
|
|
T32 |
13803 |
|
T11 |
12778 |
|
T12 |
2309 |
| auto[1] |
auto[1] |
auto[1] |
1174332 |
1 |
|
|
T32 |
8925 |
|
T1 |
2 |
|
T11 |
8349 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |