Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8196019 |
1 |
|
|
T32 |
60780 |
|
T33 |
341 |
|
T1 |
23 |
| auto[1] |
5868953 |
1 |
|
|
T32 |
46770 |
|
T1 |
6 |
|
T11 |
40442 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11702076 |
1 |
|
|
T32 |
89157 |
|
T33 |
341 |
|
T1 |
24 |
| auto[1] |
2362896 |
1 |
|
|
T32 |
18393 |
|
T1 |
5 |
|
T11 |
15944 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8117346 |
1 |
|
|
T32 |
60781 |
|
T33 |
341 |
|
T1 |
24 |
| auto[1] |
5947626 |
1 |
|
|
T32 |
46769 |
|
T1 |
5 |
|
T11 |
40530 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1793100 |
1 |
|
|
T32 |
14482 |
|
T11 |
12892 |
|
T12 |
2675 |
| auto[1] |
auto[0] |
auto[1] |
1185538 |
1 |
|
|
T32 |
9480 |
|
T1 |
5 |
|
T11 |
8094 |
| auto[1] |
auto[1] |
auto[0] |
1791630 |
1 |
|
|
T32 |
13894 |
|
T11 |
11694 |
|
T12 |
2323 |
| auto[1] |
auto[1] |
auto[1] |
1177358 |
1 |
|
|
T32 |
8913 |
|
T11 |
7850 |
|
T12 |
3175 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |