Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8173084 |
1 |
|
|
T32 |
62037 |
|
T33 |
341 |
|
T1 |
25 |
| auto[1] |
5891888 |
1 |
|
|
T32 |
45513 |
|
T1 |
4 |
|
T11 |
41225 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13319911 |
1 |
|
|
T32 |
102007 |
|
T33 |
341 |
|
T1 |
29 |
| auto[1] |
745061 |
1 |
|
|
T32 |
5543 |
|
T11 |
5381 |
|
T12 |
1591 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8196125 |
1 |
|
|
T32 |
63151 |
|
T33 |
341 |
|
T1 |
26 |
| auto[1] |
5868847 |
1 |
|
|
T32 |
44399 |
|
T1 |
3 |
|
T11 |
41465 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2564343 |
1 |
|
|
T32 |
19008 |
|
T1 |
3 |
|
T11 |
17450 |
| auto[1] |
auto[0] |
auto[1] |
372876 |
1 |
|
|
T32 |
2648 |
|
T11 |
2611 |
|
T12 |
853 |
| auto[1] |
auto[1] |
auto[0] |
2559443 |
1 |
|
|
T32 |
19848 |
|
T11 |
18634 |
|
T12 |
4386 |
| auto[1] |
auto[1] |
auto[1] |
372185 |
1 |
|
|
T32 |
2895 |
|
T11 |
2770 |
|
T12 |
738 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |