Group : cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}
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Group : cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv



Summary for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 36 0 36 100.00
Crosses 128 0 128 100.00


Variables for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_intr 32 0 32 100.00 100 1 1 0
cp_intr_en 2 0 2 100.00 100 1 1 2
cp_intr_state 2 0 2 100.00 100 1 1 2


Crosses for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
intr_cg_cc 128 0 128 100.00 100 1 1 0


Summary for Variable cp_intr

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 32 0 32 100.00


User Defined Bins for cp_intr

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 14208394 1 T31 136903 T32 351 T19 58
all_values[1] 14208394 1 T31 136903 T32 351 T19 58
all_values[2] 14208394 1 T31 136903 T32 351 T19 58
all_values[3] 14208394 1 T31 136903 T32 351 T19 58
all_values[4] 14208394 1 T31 136903 T32 351 T19 58
all_values[5] 14208394 1 T31 136903 T32 351 T19 58
all_values[6] 14208394 1 T31 136903 T32 351 T19 58
all_values[7] 14208394 1 T31 136903 T32 351 T19 58
all_values[8] 14208394 1 T31 136903 T32 351 T19 58
all_values[9] 14208394 1 T31 136903 T32 351 T19 58
all_values[10] 14208394 1 T31 136903 T32 351 T19 58
all_values[11] 14208394 1 T31 136903 T32 351 T19 58
all_values[12] 14208394 1 T31 136903 T32 351 T19 58
all_values[13] 14208394 1 T31 136903 T32 351 T19 58
all_values[14] 14208394 1 T31 136903 T32 351 T19 58
all_values[15] 14208394 1 T31 136903 T32 351 T19 58
all_values[16] 14208394 1 T31 136903 T32 351 T19 58
all_values[17] 14208394 1 T31 136903 T32 351 T19 58
all_values[18] 14208394 1 T31 136903 T32 351 T19 58
all_values[19] 14208394 1 T31 136903 T32 351 T19 58
all_values[20] 14208394 1 T31 136903 T32 351 T19 58
all_values[21] 14208394 1 T31 136903 T32 351 T19 58
all_values[22] 14208394 1 T31 136903 T32 351 T19 58
all_values[23] 14208394 1 T31 136903 T32 351 T19 58
all_values[24] 14208394 1 T31 136903 T32 351 T19 58
all_values[25] 14208394 1 T31 136903 T32 351 T19 58
all_values[26] 14208394 1 T31 136903 T32 351 T19 58
all_values[27] 14208394 1 T31 136903 T32 351 T19 58
all_values[28] 14208394 1 T31 136903 T32 351 T19 58
all_values[29] 14208394 1 T31 136903 T32 351 T19 58
all_values[30] 14208394 1 T31 136903 T32 351 T19 58
all_values[31] 14208394 1 T31 136903 T32 351 T19 58



Summary for Variable cp_intr_en

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_intr_en

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 261941849 1 T31 238630 T32 5737 T19 1313
auto[1] 192726759 1 T31 199459 T32 5495 T19 543



Summary for Variable cp_intr_state

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_intr_state

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 106455739 1 T31 773342 T32 1340 T19 1201
auto[1] 348212869 1 T31 360755 T32 9892 T19 655



Summary for Cross intr_cg_cc

Samples crossed: cp_intr cp_intr_en cp_intr_state
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 128 0 128 100.00


Automatically Generated Cross Bins for intr_cg_cc

Bins
cp_intrcp_intr_encp_intr_stateCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] auto[0] auto[0] 2738090 1 T31 18202 T32 18 T19 25
all_values[0] auto[0] auto[1] 5465982 1 T31 58539 T32 198 T19 15
all_values[0] auto[1] auto[0] 583576 1 T31 5746 T32 19 T19 5
all_values[0] auto[1] auto[1] 5420746 1 T31 54416 T32 116 T19 13
all_values[1] auto[0] auto[0] 2732259 1 T31 18673 T32 29 T19 23
all_values[1] auto[0] auto[1] 5446479 1 T31 54017 T32 140 T19 23
all_values[1] auto[1] auto[0] 591361 1 T31 6571 T32 31 T22 128
all_values[1] auto[1] auto[1] 5438295 1 T31 57642 T32 151 T19 12
all_values[2] auto[0] auto[0] 2737456 1 T31 17714 T32 4 T19 29
all_values[2] auto[0] auto[1] 5470388 1 T31 56429 T32 101 T19 5
all_values[2] auto[1] auto[0] 583014 1 T31 6352 T32 19 T19 18
all_values[2] auto[1] auto[1] 5417536 1 T31 56408 T32 227 T19 6
all_values[3] auto[0] auto[0] 2751250 1 T31 18207 T32 48 T19 25
all_values[3] auto[0] auto[1] 5417505 1 T31 54499 T32 141 T19 25
all_values[3] auto[1] auto[0] 595270 1 T31 5863 T32 28 T22 199
all_values[3] auto[1] auto[1] 5444369 1 T31 58334 T32 134 T19 8
all_values[4] auto[0] auto[0] 2735953 1 T31 18402 T32 6 T19 32
all_values[4] auto[0] auto[1] 5425798 1 T31 55200 T32 112 T19 5
all_values[4] auto[1] auto[0] 592528 1 T31 6163 T32 24 T19 13
all_values[4] auto[1] auto[1] 5454115 1 T31 57138 T32 209 T19 8
all_values[5] auto[0] auto[0] 2738386 1 T31 18258 T32 35 T19 38
all_values[5] auto[0] auto[1] 5415795 1 T31 56458 T32 184 T19 15
all_values[5] auto[1] auto[0] 588025 1 T31 6034 T32 8 T22 67
all_values[5] auto[1] auto[1] 5466188 1 T31 56153 T32 124 T19 5
all_values[6] auto[0] auto[0] 2737589 1 T31 17788 T32 33 T19 29
all_values[6] auto[0] auto[1] 5450822 1 T31 54254 T32 41 T19 13
all_values[6] auto[1] auto[0] 596903 1 T31 5951 T32 23 T19 14
all_values[6] auto[1] auto[1] 5423080 1 T31 58910 T32 254 T19 2
all_values[7] auto[0] auto[0] 2747686 1 T31 18075 T32 20 T19 35
all_values[7] auto[0] auto[1] 5455103 1 T31 56815 T32 77 T19 6
all_values[7] auto[1] auto[0] 601990 1 T31 5865 T32 43 T19 11
all_values[7] auto[1] auto[1] 5403615 1 T31 56148 T32 211 T19 6
all_values[8] auto[0] auto[0] 2743190 1 T31 18297 T32 24 T19 31
all_values[8] auto[0] auto[1] 5447624 1 T31 56348 T32 100 T19 19
all_values[8] auto[1] auto[0] 587090 1 T31 6012 T32 22 T19 7
all_values[8] auto[1] auto[1] 5430490 1 T31 56246 T32 205 T19 1
all_values[9] auto[0] auto[0] 2738873 1 T31 17802 T32 23 T19 28
all_values[9] auto[0] auto[1] 5443989 1 T31 55030 T32 156 T19 20
all_values[9] auto[1] auto[0] 583637 1 T31 6407 T32 18 T19 2
all_values[9] auto[1] auto[1] 5441895 1 T31 57664 T32 154 T19 8
all_values[10] auto[0] auto[0] 2743897 1 T31 17775 T32 3 T19 26
all_values[10] auto[0] auto[1] 5427678 1 T31 55600 T32 161 T19 2
all_values[10] auto[1] auto[0] 588851 1 T31 6081 T32 10 T19 10
all_values[10] auto[1] auto[1] 5447968 1 T31 57447 T32 177 T19 20
all_values[11] auto[0] auto[0] 2737871 1 T31 17959 T32 83 T19 25
all_values[11] auto[0] auto[1] 5428587 1 T31 56684 T32 161 T19 12
all_values[11] auto[1] auto[0] 590529 1 T31 5667 T32 17 T19 7
all_values[11] auto[1] auto[1] 5451407 1 T31 56593 T32 90 T19 14
all_values[12] auto[0] auto[0] 2731481 1 T31 18677 T32 18 T19 23
all_values[12] auto[0] auto[1] 5441898 1 T31 56012 T32 139 T19 13
all_values[12] auto[1] auto[0] 587468 1 T31 6001 T32 37 T19 6
all_values[12] auto[1] auto[1] 5447547 1 T31 56213 T32 157 T19 16
all_values[13] auto[0] auto[0] 2744512 1 T31 18396 T32 14 T19 27
all_values[13] auto[0] auto[1] 5427333 1 T31 55447 T32 160 T19 4
all_values[13] auto[1] auto[0] 581940 1 T31 5497 T32 3 T19 15
all_values[13] auto[1] auto[1] 5454609 1 T31 57563 T32 174 T19 12
all_values[14] auto[0] auto[0] 2731322 1 T31 17947 T32 28 T19 28
all_values[14] auto[0] auto[1] 5487147 1 T31 55644 T32 164 T19 13
all_values[14] auto[1] auto[0] 588912 1 T31 5653 T32 6 T19 13
all_values[14] auto[1] auto[1] 5401013 1 T31 57659 T32 153 T19 4
all_values[15] auto[0] auto[0] 2731167 1 T31 17717 T32 34 T19 26
all_values[15] auto[0] auto[1] 5446179 1 T31 56981 T32 143 T19 3
all_values[15] auto[1] auto[0] 596130 1 T31 5853 T32 12 T19 14
all_values[15] auto[1] auto[1] 5434918 1 T31 56352 T32 162 T19 15
all_values[16] auto[0] auto[0] 2735978 1 T31 18108 T32 7 T19 35
all_values[16] auto[0] auto[1] 5437084 1 T31 57830 T32 206 T19 13
all_values[16] auto[1] auto[0] 589406 1 T31 5427 T32 3 T19 5
all_values[16] auto[1] auto[1] 5445926 1 T31 55538 T32 135 T19 5
all_values[17] auto[0] auto[0] 2733417 1 T31 17950 T32 29 T19 37
all_values[17] auto[0] auto[1] 5457422 1 T31 56876 T32 178 T19 15
all_values[17] auto[1] auto[0] 583229 1 T31 5820 T32 26 T19 6
all_values[17] auto[1] auto[1] 5434326 1 T31 56257 T32 118 T22 1103
all_values[18] auto[0] auto[0] 2744970 1 T31 19296 T32 43 T19 23
all_values[18] auto[0] auto[1] 5450198 1 T31 56438 T32 250 T19 17
all_values[18] auto[1] auto[0] 592769 1 T31 6759 T32 17 T19 10
all_values[18] auto[1] auto[1] 5420457 1 T31 54410 T32 41 T19 8
all_values[19] auto[0] auto[0] 2741783 1 T31 17862 T32 18 T19 38
all_values[19] auto[0] auto[1] 5458326 1 T31 58778 T32 153 T19 12
all_values[19] auto[1] auto[0] 587422 1 T31 5729 T32 32 T19 3
all_values[19] auto[1] auto[1] 5420863 1 T31 54534 T32 148 T19 5
all_values[20] auto[0] auto[0] 2729420 1 T31 18169 T32 29 T19 38
all_values[20] auto[0] auto[1] 5437453 1 T31 55337 T32 139 T19 9
all_values[20] auto[1] auto[0] 583636 1 T31 5491 T32 15 T19 4
all_values[20] auto[1] auto[1] 5457885 1 T31 57906 T32 168 T19 7
all_values[21] auto[0] auto[0] 2734640 1 T31 17911 T32 9 T19 34
all_values[21] auto[0] auto[1] 5425824 1 T31 56450 T32 209 T19 6
all_values[21] auto[1] auto[0] 591916 1 T31 5392 T32 1 T19 6
all_values[21] auto[1] auto[1] 5456014 1 T31 57150 T32 132 T19 12
all_values[22] auto[0] auto[0] 2731089 1 T31 18241 T32 7 T19 22
all_values[22] auto[0] auto[1] 5463650 1 T31 55975 T32 142 T19 26
all_values[22] auto[1] auto[0] 594433 1 T31 5659 T32 28 T22 133
all_values[22] auto[1] auto[1] 5419222 1 T31 57028 T32 174 T19 10
all_values[23] auto[0] auto[0] 2735292 1 T31 18280 T32 13 T19 27
all_values[23] auto[0] auto[1] 5438238 1 T31 57149 T32 144 T19 20
all_values[23] auto[1] auto[0] 597635 1 T31 5893 T32 24 T19 4
all_values[23] auto[1] auto[1] 5437229 1 T31 55581 T32 170 T19 7
all_values[24] auto[0] auto[0] 2738106 1 T31 18572 T32 36 T19 33
all_values[24] auto[0] auto[1] 5458889 1 T31 57676 T32 201 T19 9
all_values[24] auto[1] auto[0] 589867 1 T31 5817 T32 7 T19 15
all_values[24] auto[1] auto[1] 5421532 1 T31 54838 T32 107 T19 1
all_values[25] auto[0] auto[0] 2732911 1 T31 18810 T32 54 T19 25
all_values[25] auto[0] auto[1] 5452844 1 T31 54703 T32 131 T19 1
all_values[25] auto[1] auto[0] 581366 1 T31 6297 T32 15 T19 12
all_values[25] auto[1] auto[1] 5441273 1 T31 57093 T32 151 T19 20
all_values[26] auto[0] auto[0] 2738470 1 T31 17917 T32 6 T19 26
all_values[26] auto[0] auto[1] 5470582 1 T31 57272 T32 192 T19 5
all_values[26] auto[1] auto[0] 590249 1 T31 6236 T32 16 T19 19
all_values[26] auto[1] auto[1] 5409093 1 T31 55478 T32 137 T19 8
all_values[27] auto[0] auto[0] 2729410 1 T31 18253 T32 34 T19 30
all_values[27] auto[0] auto[1] 5467415 1 T31 58452 T32 196 T19 4
all_values[27] auto[1] auto[0] 583822 1 T31 5387 T32 26 T19 5
all_values[27] auto[1] auto[1] 5427747 1 T31 54811 T32 95 T19 19
all_values[28] auto[0] auto[0] 2746293 1 T31 18255 T32 4 T19 36
all_values[28] auto[0] auto[1] 5412626 1 T31 56202 T32 154 T19 8
all_values[28] auto[1] auto[0] 583783 1 T31 6023 T32 23 T19 8
all_values[28] auto[1] auto[1] 5465692 1 T31 56423 T32 170 T19 6
all_values[29] auto[0] auto[0] 2741367 1 T31 17922 T32 16 T19 27
all_values[29] auto[0] auto[1] 5424496 1 T31 56796 T32 159 T19 9
all_values[29] auto[1] auto[0] 596816 1 T31 6256 T32 13 T19 7
all_values[29] auto[1] auto[1] 5445715 1 T31 55929 T32 163 T19 15
all_values[30] auto[0] auto[0] 2735148 1 T31 18198 T32 12 T19 30
all_values[30] auto[0] auto[1] 5473137 1 T31 56958 T32 133 T19 13
all_values[30] auto[1] auto[0] 581391 1 T31 6170 T32 15 T19 8
all_values[30] auto[1] auto[1] 5418718 1 T31 55577 T32 191 T19 7
all_values[31] auto[0] auto[0] 2736886 1 T31 19261 T32 15 T19 37
all_values[31] auto[0] auto[1] 5509196 1 T31 56559 T32 220 T19 5
all_values[31] auto[1] auto[0] 584613 1 T31 6376 T32 7 T19 6
all_values[31] auto[1] auto[1] 5377699 1 T31 54707 T32 109 T19 10

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