Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8178738 |
1 |
|
|
T31 |
72690 |
|
T32 |
169 |
|
T19 |
46 |
| auto[1] |
6029656 |
1 |
|
|
T31 |
64213 |
|
T32 |
182 |
|
T19 |
12 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11701814 |
1 |
|
|
T31 |
112856 |
|
T32 |
309 |
|
T19 |
58 |
| auto[1] |
2506580 |
1 |
|
|
T31 |
24047 |
|
T32 |
42 |
|
T22 |
617 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8175765 |
1 |
|
|
T31 |
74617 |
|
T32 |
153 |
|
T19 |
58 |
| auto[1] |
6032629 |
1 |
|
|
T31 |
62286 |
|
T32 |
198 |
|
T22 |
1228 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1765957 |
1 |
|
|
T31 |
18887 |
|
T32 |
100 |
|
T22 |
345 |
| auto[1] |
auto[0] |
auto[1] |
1252711 |
1 |
|
|
T31 |
12113 |
|
T32 |
16 |
|
T22 |
326 |
| auto[1] |
auto[1] |
auto[0] |
1760092 |
1 |
|
|
T31 |
19352 |
|
T32 |
56 |
|
T22 |
266 |
| auto[1] |
auto[1] |
auto[1] |
1253869 |
1 |
|
|
T31 |
11934 |
|
T32 |
26 |
|
T22 |
291 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |