Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8171845 |
1 |
|
|
T31 |
73843 |
|
T32 |
174 |
|
T19 |
31 |
| auto[1] |
6036549 |
1 |
|
|
T31 |
63060 |
|
T32 |
177 |
|
T19 |
27 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11702000 |
1 |
|
|
T31 |
112575 |
|
T32 |
321 |
|
T19 |
56 |
| auto[1] |
2506394 |
1 |
|
|
T31 |
24328 |
|
T32 |
30 |
|
T19 |
2 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8184187 |
1 |
|
|
T31 |
76219 |
|
T32 |
169 |
|
T19 |
56 |
| auto[1] |
6024207 |
1 |
|
|
T31 |
60684 |
|
T32 |
182 |
|
T19 |
2 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1766779 |
1 |
|
|
T31 |
18613 |
|
T32 |
63 |
|
T22 |
323 |
| auto[1] |
auto[0] |
auto[1] |
1257492 |
1 |
|
|
T31 |
12353 |
|
T32 |
20 |
|
T19 |
2 |
| auto[1] |
auto[1] |
auto[0] |
1751034 |
1 |
|
|
T31 |
17743 |
|
T32 |
89 |
|
T22 |
405 |
| auto[1] |
auto[1] |
auto[1] |
1248902 |
1 |
|
|
T31 |
11975 |
|
T32 |
10 |
|
T22 |
372 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |