Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8173062 |
1 |
|
|
T31 |
75938 |
|
T32 |
213 |
|
T19 |
48 |
| auto[1] |
6035332 |
1 |
|
|
T31 |
60965 |
|
T32 |
138 |
|
T19 |
10 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11693528 |
1 |
|
|
T31 |
112400 |
|
T32 |
326 |
|
T19 |
58 |
| auto[1] |
2514866 |
1 |
|
|
T31 |
24503 |
|
T32 |
25 |
|
T22 |
567 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8150223 |
1 |
|
|
T31 |
73583 |
|
T32 |
183 |
|
T19 |
56 |
| auto[1] |
6058171 |
1 |
|
|
T31 |
63320 |
|
T32 |
168 |
|
T19 |
2 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1772376 |
1 |
|
|
T31 |
19620 |
|
T32 |
82 |
|
T22 |
260 |
| auto[1] |
auto[0] |
auto[1] |
1258538 |
1 |
|
|
T31 |
12479 |
|
T32 |
11 |
|
T22 |
257 |
| auto[1] |
auto[1] |
auto[0] |
1770929 |
1 |
|
|
T31 |
19197 |
|
T32 |
61 |
|
T19 |
2 |
| auto[1] |
auto[1] |
auto[1] |
1256328 |
1 |
|
|
T31 |
12024 |
|
T32 |
14 |
|
T22 |
310 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |