Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8195168 |
1 |
|
|
T31 |
75734 |
|
T32 |
293 |
|
T19 |
40 |
| auto[1] |
6013226 |
1 |
|
|
T31 |
61169 |
|
T32 |
58 |
|
T19 |
18 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11693175 |
1 |
|
|
T31 |
113574 |
|
T32 |
306 |
|
T19 |
58 |
| auto[1] |
2515219 |
1 |
|
|
T31 |
23329 |
|
T32 |
45 |
|
T22 |
669 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8165365 |
1 |
|
|
T31 |
77239 |
|
T32 |
196 |
|
T19 |
56 |
| auto[1] |
6043029 |
1 |
|
|
T31 |
59664 |
|
T32 |
155 |
|
T19 |
2 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1770566 |
1 |
|
|
T31 |
18441 |
|
T32 |
85 |
|
T22 |
323 |
| auto[1] |
auto[0] |
auto[1] |
1263673 |
1 |
|
|
T31 |
11640 |
|
T32 |
34 |
|
T22 |
343 |
| auto[1] |
auto[1] |
auto[0] |
1757244 |
1 |
|
|
T31 |
17894 |
|
T32 |
25 |
|
T19 |
2 |
| auto[1] |
auto[1] |
auto[1] |
1251546 |
1 |
|
|
T31 |
11689 |
|
T32 |
11 |
|
T22 |
326 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |