Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8200109 |
1 |
|
|
T31 |
76640 |
|
T32 |
171 |
|
T19 |
50 |
| auto[1] |
6008285 |
1 |
|
|
T31 |
60263 |
|
T32 |
180 |
|
T19 |
8 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11696326 |
1 |
|
|
T31 |
111422 |
|
T32 |
317 |
|
T19 |
58 |
| auto[1] |
2512068 |
1 |
|
|
T31 |
25481 |
|
T32 |
34 |
|
T22 |
682 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8171425 |
1 |
|
|
T31 |
72927 |
|
T32 |
219 |
|
T19 |
54 |
| auto[1] |
6036969 |
1 |
|
|
T31 |
63976 |
|
T32 |
132 |
|
T19 |
4 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1771039 |
1 |
|
|
T31 |
20277 |
|
T32 |
54 |
|
T19 |
4 |
| auto[1] |
auto[0] |
auto[1] |
1260353 |
1 |
|
|
T31 |
13113 |
|
T32 |
16 |
|
T22 |
418 |
| auto[1] |
auto[1] |
auto[0] |
1753862 |
1 |
|
|
T31 |
18218 |
|
T32 |
44 |
|
T22 |
269 |
| auto[1] |
auto[1] |
auto[1] |
1251715 |
1 |
|
|
T31 |
12368 |
|
T32 |
18 |
|
T22 |
264 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |