Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8173530 |
1 |
|
|
T31 |
75429 |
|
T32 |
157 |
|
T19 |
47 |
| auto[1] |
6034864 |
1 |
|
|
T31 |
61474 |
|
T32 |
194 |
|
T19 |
11 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11706502 |
1 |
|
|
T31 |
113061 |
|
T32 |
301 |
|
T19 |
58 |
| auto[1] |
2501892 |
1 |
|
|
T31 |
23842 |
|
T32 |
50 |
|
T22 |
676 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8187736 |
1 |
|
|
T31 |
76218 |
|
T32 |
188 |
|
T19 |
56 |
| auto[1] |
6020658 |
1 |
|
|
T31 |
60685 |
|
T32 |
163 |
|
T19 |
2 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1757904 |
1 |
|
|
T31 |
18786 |
|
T32 |
31 |
|
T19 |
2 |
| auto[1] |
auto[0] |
auto[1] |
1251305 |
1 |
|
|
T31 |
12241 |
|
T32 |
29 |
|
T22 |
386 |
| auto[1] |
auto[1] |
auto[0] |
1760862 |
1 |
|
|
T31 |
18057 |
|
T32 |
82 |
|
T22 |
290 |
| auto[1] |
auto[1] |
auto[1] |
1250587 |
1 |
|
|
T31 |
11601 |
|
T32 |
21 |
|
T22 |
290 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |