cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53587 |
1 |
|
|
T63 |
639 |
|
T116 |
1124 |
|
T117 |
1550 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48269 |
1 |
|
|
T63 |
812 |
|
T116 |
1951 |
|
T117 |
652 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51648 |
1 |
|
|
T63 |
1534 |
|
T116 |
862 |
|
T117 |
1623 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46597 |
1 |
|
|
T63 |
735 |
|
T116 |
1071 |
|
T117 |
1698 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T63 |
43 |
|
T116 |
41 |
|
T117 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T63 |
14 |
|
T116 |
16 |
|
T117 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1644 |
1 |
|
|
T63 |
42 |
|
T116 |
43 |
|
T117 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T63 |
42 |
|
T116 |
40 |
|
T117 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T63 |
14 |
|
T116 |
16 |
|
T117 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1616 |
1 |
|
|
T63 |
41 |
|
T116 |
43 |
|
T117 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1590 |
1 |
|
|
T63 |
42 |
|
T116 |
40 |
|
T117 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T63 |
40 |
|
T116 |
43 |
|
T117 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T63 |
40 |
|
T116 |
40 |
|
T117 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T63 |
40 |
|
T116 |
42 |
|
T117 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T63 |
39 |
|
T116 |
38 |
|
T117 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T63 |
39 |
|
T116 |
42 |
|
T117 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T63 |
39 |
|
T116 |
37 |
|
T117 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T63 |
39 |
|
T116 |
41 |
|
T117 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T63 |
39 |
|
T116 |
36 |
|
T117 |
33 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T63 |
39 |
|
T116 |
38 |
|
T117 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T63 |
38 |
|
T116 |
36 |
|
T117 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T63 |
37 |
|
T116 |
38 |
|
T117 |
33 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T63 |
37 |
|
T116 |
36 |
|
T117 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T63 |
37 |
|
T116 |
38 |
|
T117 |
33 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T63 |
33 |
|
T116 |
36 |
|
T117 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T63 |
37 |
|
T116 |
37 |
|
T117 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T63 |
32 |
|
T116 |
36 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T63 |
36 |
|
T116 |
36 |
|
T117 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T63 |
31 |
|
T116 |
35 |
|
T117 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T63 |
36 |
|
T116 |
36 |
|
T117 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T63 |
31 |
|
T116 |
35 |
|
T117 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T63 |
33 |
|
T116 |
36 |
|
T117 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T63 |
30 |
|
T116 |
35 |
|
T117 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T63 |
31 |
|
T116 |
34 |
|
T117 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1188 |
1 |
|
|
T63 |
28 |
|
T116 |
34 |
|
T117 |
24 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T63 |
31 |
|
T116 |
34 |
|
T117 |
26 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54219 |
1 |
|
|
T63 |
619 |
|
T116 |
942 |
|
T117 |
1240 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50510 |
1 |
|
|
T63 |
1497 |
|
T116 |
904 |
|
T117 |
993 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57580 |
1 |
|
|
T63 |
934 |
|
T116 |
2524 |
|
T117 |
2524 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40216 |
1 |
|
|
T63 |
798 |
|
T116 |
826 |
|
T117 |
846 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T63 |
12 |
|
T116 |
16 |
|
T117 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T63 |
40 |
|
T116 |
37 |
|
T117 |
36 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T63 |
12 |
|
T116 |
18 |
|
T117 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T63 |
39 |
|
T116 |
36 |
|
T117 |
34 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T63 |
12 |
|
T116 |
16 |
|
T117 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T63 |
38 |
|
T116 |
36 |
|
T117 |
35 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T63 |
12 |
|
T116 |
18 |
|
T117 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T63 |
39 |
|
T116 |
36 |
|
T117 |
34 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T63 |
12 |
|
T116 |
16 |
|
T117 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T63 |
38 |
|
T116 |
35 |
|
T117 |
35 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T63 |
12 |
|
T116 |
18 |
|
T117 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T63 |
37 |
|
T116 |
36 |
|
T117 |
34 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T63 |
12 |
|
T116 |
16 |
|
T117 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T63 |
38 |
|
T116 |
35 |
|
T117 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T63 |
12 |
|
T116 |
18 |
|
T117 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T63 |
36 |
|
T116 |
36 |
|
T117 |
34 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T63 |
12 |
|
T116 |
16 |
|
T117 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T63 |
38 |
|
T116 |
35 |
|
T117 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T63 |
12 |
|
T116 |
18 |
|
T117 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T63 |
36 |
|
T116 |
35 |
|
T117 |
34 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T63 |
12 |
|
T116 |
16 |
|
T117 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T63 |
36 |
|
T116 |
35 |
|
T117 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T63 |
12 |
|
T116 |
18 |
|
T117 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T63 |
36 |
|
T116 |
33 |
|
T117 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T63 |
11 |
|
T116 |
16 |
|
T117 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T63 |
36 |
|
T116 |
34 |
|
T117 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T63 |
12 |
|
T116 |
17 |
|
T117 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T63 |
35 |
|
T116 |
31 |
|
T117 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T63 |
11 |
|
T116 |
16 |
|
T117 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T63 |
33 |
|
T116 |
33 |
|
T117 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T63 |
12 |
|
T116 |
17 |
|
T117 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T63 |
35 |
|
T116 |
30 |
|
T117 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T63 |
11 |
|
T116 |
16 |
|
T117 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T63 |
33 |
|
T116 |
32 |
|
T117 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T63 |
12 |
|
T116 |
17 |
|
T117 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T63 |
34 |
|
T116 |
27 |
|
T117 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T63 |
11 |
|
T116 |
16 |
|
T117 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T63 |
33 |
|
T116 |
31 |
|
T117 |
32 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T63 |
12 |
|
T116 |
17 |
|
T117 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T63 |
33 |
|
T116 |
26 |
|
T117 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T63 |
11 |
|
T116 |
16 |
|
T117 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T63 |
32 |
|
T116 |
31 |
|
T117 |
32 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T63 |
12 |
|
T116 |
17 |
|
T117 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T63 |
33 |
|
T116 |
26 |
|
T117 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T63 |
11 |
|
T116 |
16 |
|
T117 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T63 |
31 |
|
T116 |
31 |
|
T117 |
31 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T63 |
12 |
|
T116 |
17 |
|
T117 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T63 |
31 |
|
T116 |
26 |
|
T117 |
30 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T63 |
11 |
|
T116 |
16 |
|
T117 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T63 |
31 |
|
T116 |
30 |
|
T117 |
30 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T63 |
12 |
|
T116 |
17 |
|
T117 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1177 |
1 |
|
|
T63 |
31 |
|
T116 |
25 |
|
T117 |
30 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T63 |
11 |
|
T116 |
16 |
|
T117 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T63 |
30 |
|
T116 |
29 |
|
T117 |
29 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T63 |
12 |
|
T116 |
17 |
|
T117 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1139 |
1 |
|
|
T63 |
29 |
|
T116 |
25 |
|
T117 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T63 |
11 |
|
T116 |
16 |
|
T117 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1154 |
1 |
|
|
T63 |
30 |
|
T116 |
29 |
|
T117 |
29 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T63 |
12 |
|
T116 |
17 |
|
T117 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1104 |
1 |
|
|
T63 |
27 |
|
T116 |
23 |
|
T117 |
27 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55970 |
1 |
|
|
T63 |
1867 |
|
T116 |
1059 |
|
T117 |
1572 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45676 |
1 |
|
|
T63 |
382 |
|
T116 |
1100 |
|
T117 |
963 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57623 |
1 |
|
|
T63 |
1342 |
|
T116 |
1720 |
|
T117 |
1431 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43657 |
1 |
|
|
T63 |
505 |
|
T116 |
1037 |
|
T117 |
1524 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T63 |
17 |
|
T116 |
18 |
|
T117 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T63 |
24 |
|
T116 |
46 |
|
T117 |
57 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T63 |
22 |
|
T116 |
17 |
|
T117 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T63 |
18 |
|
T116 |
48 |
|
T117 |
54 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T63 |
17 |
|
T116 |
18 |
|
T117 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T63 |
24 |
|
T116 |
45 |
|
T117 |
56 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T63 |
22 |
|
T116 |
17 |
|
T117 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1556 |
1 |
|
|
T63 |
18 |
|
T116 |
48 |
|
T117 |
53 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T63 |
17 |
|
T116 |
18 |
|
T117 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T63 |
24 |
|
T116 |
45 |
|
T117 |
54 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T63 |
22 |
|
T116 |
17 |
|
T117 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T63 |
18 |
|
T116 |
48 |
|
T117 |
53 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T63 |
17 |
|
T116 |
18 |
|
T117 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T63 |
23 |
|
T116 |
43 |
|
T117 |
51 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T63 |
22 |
|
T116 |
17 |
|
T117 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T63 |
17 |
|
T116 |
48 |
|
T117 |
53 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T63 |
17 |
|
T116 |
18 |
|
T117 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T63 |
23 |
|
T116 |
42 |
|
T117 |
48 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T63 |
22 |
|
T116 |
17 |
|
T117 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T63 |
17 |
|
T116 |
46 |
|
T117 |
54 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T63 |
17 |
|
T116 |
18 |
|
T117 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T63 |
22 |
|
T116 |
41 |
|
T117 |
48 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T63 |
22 |
|
T116 |
17 |
|
T117 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T63 |
17 |
|
T116 |
43 |
|
T117 |
53 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T63 |
17 |
|
T116 |
18 |
|
T117 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T63 |
22 |
|
T116 |
39 |
|
T117 |
44 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T63 |
22 |
|
T116 |
17 |
|
T117 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T63 |
16 |
|
T116 |
43 |
|
T117 |
52 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T63 |
17 |
|
T116 |
18 |
|
T117 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T63 |
21 |
|
T116 |
38 |
|
T117 |
43 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T63 |
22 |
|
T116 |
17 |
|
T117 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T63 |
16 |
|
T116 |
41 |
|
T117 |
50 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T63 |
17 |
|
T116 |
18 |
|
T117 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T63 |
21 |
|
T116 |
38 |
|
T117 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T63 |
22 |
|
T116 |
17 |
|
T117 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T63 |
16 |
|
T116 |
37 |
|
T117 |
48 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T63 |
17 |
|
T116 |
18 |
|
T117 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T63 |
19 |
|
T116 |
37 |
|
T117 |
40 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T63 |
22 |
|
T116 |
17 |
|
T117 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T63 |
16 |
|
T116 |
36 |
|
T117 |
48 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T63 |
17 |
|
T116 |
18 |
|
T117 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T63 |
19 |
|
T116 |
36 |
|
T117 |
38 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T63 |
22 |
|
T116 |
17 |
|
T117 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T63 |
14 |
|
T116 |
36 |
|
T117 |
47 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T63 |
17 |
|
T116 |
18 |
|
T117 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T63 |
18 |
|
T116 |
36 |
|
T117 |
38 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T63 |
22 |
|
T116 |
17 |
|
T117 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T63 |
14 |
|
T116 |
35 |
|
T117 |
47 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T63 |
17 |
|
T116 |
18 |
|
T117 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1201 |
1 |
|
|
T63 |
18 |
|
T116 |
36 |
|
T117 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T63 |
22 |
|
T116 |
17 |
|
T117 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T63 |
13 |
|
T116 |
35 |
|
T117 |
47 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T63 |
17 |
|
T116 |
18 |
|
T117 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1175 |
1 |
|
|
T63 |
18 |
|
T116 |
35 |
|
T117 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T63 |
22 |
|
T116 |
17 |
|
T117 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1179 |
1 |
|
|
T63 |
12 |
|
T116 |
33 |
|
T117 |
47 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T63 |
17 |
|
T116 |
18 |
|
T117 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1145 |
1 |
|
|
T63 |
16 |
|
T116 |
34 |
|
T117 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T63 |
22 |
|
T116 |
17 |
|
T117 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1151 |
1 |
|
|
T63 |
12 |
|
T116 |
32 |
|
T117 |
47 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56426 |
1 |
|
|
T63 |
1767 |
|
T116 |
1054 |
|
T117 |
1891 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47288 |
1 |
|
|
T63 |
468 |
|
T116 |
2092 |
|
T117 |
1239 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56433 |
1 |
|
|
T63 |
1048 |
|
T116 |
725 |
|
T117 |
1422 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41212 |
1 |
|
|
T63 |
645 |
|
T116 |
974 |
|
T117 |
897 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T63 |
20 |
|
T116 |
12 |
|
T117 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T63 |
27 |
|
T116 |
57 |
|
T117 |
53 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T63 |
18 |
|
T116 |
16 |
|
T117 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T63 |
28 |
|
T116 |
53 |
|
T117 |
44 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T63 |
20 |
|
T116 |
12 |
|
T117 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T63 |
24 |
|
T116 |
56 |
|
T117 |
53 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T63 |
18 |
|
T116 |
16 |
|
T117 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T63 |
28 |
|
T116 |
53 |
|
T117 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T63 |
20 |
|
T116 |
12 |
|
T117 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T63 |
24 |
|
T116 |
54 |
|
T117 |
52 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T63 |
28 |
|
T116 |
51 |
|
T117 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T63 |
20 |
|
T116 |
12 |
|
T117 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T63 |
24 |
|
T116 |
54 |
|
T117 |
50 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T63 |
27 |
|
T116 |
47 |
|
T117 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T63 |
20 |
|
T116 |
12 |
|
T117 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T63 |
24 |
|
T116 |
54 |
|
T117 |
49 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T63 |
27 |
|
T116 |
44 |
|
T117 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T63 |
20 |
|
T116 |
12 |
|
T117 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T63 |
23 |
|
T116 |
52 |
|
T117 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T63 |
27 |
|
T116 |
41 |
|
T117 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T63 |
20 |
|
T116 |
12 |
|
T117 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T63 |
22 |
|
T116 |
51 |
|
T117 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T63 |
27 |
|
T116 |
41 |
|
T117 |
37 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T63 |
20 |
|
T116 |
12 |
|
T117 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T63 |
22 |
|
T116 |
50 |
|
T117 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T63 |
27 |
|
T116 |
40 |
|
T117 |
36 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T63 |
20 |
|
T116 |
12 |
|
T117 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T63 |
22 |
|
T116 |
50 |
|
T117 |
44 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T63 |
27 |
|
T116 |
39 |
|
T117 |
36 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T63 |
20 |
|
T116 |
12 |
|
T117 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T63 |
21 |
|
T116 |
50 |
|
T117 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T63 |
27 |
|
T116 |
39 |
|
T117 |
36 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T63 |
20 |
|
T116 |
12 |
|
T117 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T63 |
21 |
|
T116 |
49 |
|
T117 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T63 |
26 |
|
T116 |
38 |
|
T117 |
34 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T63 |
20 |
|
T116 |
12 |
|
T117 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T63 |
20 |
|
T116 |
49 |
|
T117 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T63 |
26 |
|
T116 |
37 |
|
T117 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T63 |
20 |
|
T116 |
12 |
|
T117 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T63 |
19 |
|
T116 |
48 |
|
T117 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T63 |
26 |
|
T116 |
36 |
|
T117 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T63 |
20 |
|
T116 |
12 |
|
T117 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T63 |
19 |
|
T116 |
46 |
|
T117 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T63 |
26 |
|
T116 |
34 |
|
T117 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T63 |
20 |
|
T116 |
12 |
|
T117 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1147 |
1 |
|
|
T63 |
17 |
|
T116 |
43 |
|
T117 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T63 |
23 |
|
T116 |
33 |
|
T117 |
33 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59130 |
1 |
|
|
T63 |
750 |
|
T116 |
938 |
|
T117 |
2564 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47691 |
1 |
|
|
T63 |
1327 |
|
T116 |
1875 |
|
T117 |
1064 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51665 |
1 |
|
|
T63 |
1144 |
|
T116 |
841 |
|
T117 |
1146 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43587 |
1 |
|
|
T63 |
756 |
|
T116 |
1215 |
|
T117 |
889 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T63 |
15 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T63 |
33 |
|
T116 |
50 |
|
T117 |
40 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T63 |
13 |
|
T116 |
16 |
|
T117 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T63 |
34 |
|
T116 |
49 |
|
T117 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T63 |
15 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T63 |
32 |
|
T116 |
49 |
|
T117 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T63 |
13 |
|
T116 |
16 |
|
T117 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T63 |
33 |
|
T116 |
48 |
|
T117 |
36 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T63 |
15 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T63 |
31 |
|
T116 |
48 |
|
T117 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T63 |
30 |
|
T116 |
48 |
|
T117 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T63 |
15 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T63 |
31 |
|
T116 |
47 |
|
T117 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T63 |
28 |
|
T116 |
48 |
|
T117 |
34 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T63 |
15 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T63 |
31 |
|
T116 |
46 |
|
T117 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T63 |
27 |
|
T116 |
48 |
|
T117 |
32 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T63 |
15 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T63 |
31 |
|
T116 |
43 |
|
T117 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T63 |
25 |
|
T116 |
47 |
|
T117 |
31 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T63 |
31 |
|
T116 |
43 |
|
T117 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T63 |
25 |
|
T116 |
46 |
|
T117 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T63 |
30 |
|
T116 |
42 |
|
T117 |
36 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T63 |
25 |
|
T116 |
45 |
|
T117 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T63 |
30 |
|
T116 |
42 |
|
T117 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T63 |
25 |
|
T116 |
45 |
|
T117 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T63 |
30 |
|
T116 |
41 |
|
T117 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T63 |
25 |
|
T116 |
44 |
|
T117 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T63 |
30 |
|
T116 |
41 |
|
T117 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T63 |
24 |
|
T116 |
43 |
|
T117 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T63 |
30 |
|
T116 |
39 |
|
T117 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T63 |
24 |
|
T116 |
43 |
|
T117 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T63 |
29 |
|
T116 |
39 |
|
T117 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T63 |
21 |
|
T116 |
42 |
|
T117 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1203 |
1 |
|
|
T63 |
26 |
|
T116 |
38 |
|
T117 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T63 |
21 |
|
T116 |
42 |
|
T117 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1168 |
1 |
|
|
T63 |
26 |
|
T116 |
35 |
|
T117 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
21 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1149 |
1 |
|
|
T63 |
21 |
|
T116 |
39 |
|
T117 |
27 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60226 |
1 |
|
|
T63 |
982 |
|
T116 |
819 |
|
T117 |
2363 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45848 |
1 |
|
|
T63 |
914 |
|
T116 |
961 |
|
T117 |
946 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49999 |
1 |
|
|
T63 |
1299 |
|
T116 |
1135 |
|
T117 |
1392 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44515 |
1 |
|
|
T63 |
648 |
|
T116 |
1928 |
|
T117 |
863 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T63 |
13 |
|
T116 |
12 |
|
T117 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T63 |
39 |
|
T116 |
54 |
|
T117 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T63 |
38 |
|
T116 |
52 |
|
T117 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T63 |
13 |
|
T116 |
12 |
|
T117 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T63 |
39 |
|
T116 |
52 |
|
T117 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1626 |
1 |
|
|
T63 |
35 |
|
T116 |
52 |
|
T117 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T63 |
13 |
|
T116 |
12 |
|
T117 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T63 |
37 |
|
T116 |
52 |
|
T117 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T63 |
33 |
|
T116 |
53 |
|
T117 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T63 |
13 |
|
T116 |
12 |
|
T117 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T63 |
37 |
|
T116 |
52 |
|
T117 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T63 |
31 |
|
T116 |
51 |
|
T117 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T63 |
13 |
|
T116 |
12 |
|
T117 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T63 |
37 |
|
T116 |
51 |
|
T117 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T63 |
31 |
|
T116 |
51 |
|
T117 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T63 |
13 |
|
T116 |
12 |
|
T117 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T63 |
37 |
|
T116 |
49 |
|
T117 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T63 |
30 |
|
T116 |
50 |
|
T117 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T63 |
13 |
|
T116 |
12 |
|
T117 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T63 |
36 |
|
T116 |
46 |
|
T117 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T63 |
29 |
|
T116 |
48 |
|
T117 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T63 |
13 |
|
T116 |
12 |
|
T117 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T63 |
36 |
|
T116 |
46 |
|
T117 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T63 |
28 |
|
T116 |
48 |
|
T117 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T63 |
13 |
|
T116 |
12 |
|
T117 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T63 |
36 |
|
T116 |
46 |
|
T117 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T63 |
28 |
|
T116 |
45 |
|
T117 |
34 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T63 |
13 |
|
T116 |
12 |
|
T117 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T63 |
36 |
|
T116 |
46 |
|
T117 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T63 |
28 |
|
T116 |
45 |
|
T117 |
32 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T63 |
13 |
|
T116 |
12 |
|
T117 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T63 |
36 |
|
T116 |
43 |
|
T117 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T63 |
27 |
|
T116 |
45 |
|
T117 |
32 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T63 |
13 |
|
T116 |
12 |
|
T117 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T63 |
36 |
|
T116 |
41 |
|
T117 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T63 |
27 |
|
T116 |
44 |
|
T117 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T63 |
13 |
|
T116 |
12 |
|
T117 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T63 |
36 |
|
T116 |
41 |
|
T117 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T63 |
24 |
|
T116 |
43 |
|
T117 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T63 |
13 |
|
T116 |
12 |
|
T117 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T63 |
34 |
|
T116 |
39 |
|
T117 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T63 |
23 |
|
T116 |
42 |
|
T117 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T63 |
13 |
|
T116 |
12 |
|
T117 |
19 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T63 |
33 |
|
T116 |
39 |
|
T117 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T63 |
22 |
|
T116 |
40 |
|
T117 |
27 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54482 |
1 |
|
|
T63 |
1773 |
|
T116 |
2177 |
|
T117 |
1096 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45981 |
1 |
|
|
T63 |
625 |
|
T116 |
904 |
|
T117 |
1247 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54418 |
1 |
|
|
T63 |
991 |
|
T116 |
790 |
|
T117 |
2395 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45308 |
1 |
|
|
T63 |
641 |
|
T116 |
1032 |
|
T117 |
663 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T63 |
16 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1670 |
1 |
|
|
T63 |
29 |
|
T116 |
46 |
|
T117 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1658 |
1 |
|
|
T63 |
29 |
|
T116 |
50 |
|
T117 |
47 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T63 |
16 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T63 |
28 |
|
T116 |
45 |
|
T117 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T63 |
29 |
|
T116 |
50 |
|
T117 |
47 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T63 |
16 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T63 |
27 |
|
T116 |
45 |
|
T117 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T63 |
29 |
|
T116 |
49 |
|
T117 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T63 |
16 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T63 |
26 |
|
T116 |
44 |
|
T117 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
23 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T63 |
28 |
|
T116 |
49 |
|
T117 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T63 |
16 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T63 |
26 |
|
T116 |
43 |
|
T117 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T63 |
27 |
|
T116 |
48 |
|
T117 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T63 |
16 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T63 |
25 |
|
T116 |
43 |
|
T117 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T63 |
27 |
|
T116 |
48 |
|
T117 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T63 |
15 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T63 |
25 |
|
T116 |
43 |
|
T117 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T63 |
25 |
|
T116 |
46 |
|
T117 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T63 |
15 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T63 |
25 |
|
T116 |
42 |
|
T117 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T63 |
25 |
|
T116 |
46 |
|
T117 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T63 |
15 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T63 |
25 |
|
T116 |
41 |
|
T117 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T63 |
24 |
|
T116 |
46 |
|
T117 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T63 |
15 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T63 |
24 |
|
T116 |
41 |
|
T117 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T63 |
23 |
|
T116 |
42 |
|
T117 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T63 |
15 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T63 |
22 |
|
T116 |
40 |
|
T117 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T63 |
22 |
|
T116 |
42 |
|
T117 |
37 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T63 |
15 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T63 |
22 |
|
T116 |
39 |
|
T117 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T63 |
22 |
|
T116 |
41 |
|
T117 |
37 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T63 |
15 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T63 |
22 |
|
T116 |
37 |
|
T117 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T63 |
22 |
|
T116 |
38 |
|
T117 |
34 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T63 |
15 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T63 |
21 |
|
T116 |
36 |
|
T117 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T63 |
21 |
|
T116 |
37 |
|
T117 |
34 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T63 |
15 |
|
T116 |
17 |
|
T117 |
21 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T63 |
20 |
|
T116 |
35 |
|
T117 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
22 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T63 |
21 |
|
T116 |
36 |
|
T117 |
34 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55964 |
1 |
|
|
T63 |
714 |
|
T116 |
1203 |
|
T117 |
2117 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40514 |
1 |
|
|
T63 |
1025 |
|
T116 |
1269 |
|
T117 |
1188 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54472 |
1 |
|
|
T63 |
1417 |
|
T116 |
683 |
|
T117 |
1143 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50819 |
1 |
|
|
T63 |
840 |
|
T116 |
1955 |
|
T117 |
905 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T63 |
12 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T63 |
34 |
|
T116 |
44 |
|
T117 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T63 |
10 |
|
T116 |
9 |
|
T117 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T63 |
36 |
|
T116 |
49 |
|
T117 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T63 |
12 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T63 |
33 |
|
T116 |
43 |
|
T117 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T63 |
10 |
|
T116 |
9 |
|
T117 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T63 |
35 |
|
T116 |
46 |
|
T117 |
48 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T63 |
12 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T63 |
33 |
|
T116 |
41 |
|
T117 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T63 |
10 |
|
T116 |
8 |
|
T117 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T63 |
35 |
|
T116 |
46 |
|
T117 |
47 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T63 |
12 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T63 |
32 |
|
T116 |
40 |
|
T117 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T63 |
10 |
|
T116 |
8 |
|
T117 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T63 |
35 |
|
T116 |
46 |
|
T117 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T63 |
12 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T63 |
30 |
|
T116 |
39 |
|
T117 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T63 |
10 |
|
T116 |
8 |
|
T117 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T63 |
33 |
|
T116 |
46 |
|
T117 |
45 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T63 |
12 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T63 |
29 |
|
T116 |
38 |
|
T117 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T63 |
10 |
|
T116 |
8 |
|
T117 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T63 |
33 |
|
T116 |
45 |
|
T117 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T63 |
11 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T63 |
29 |
|
T116 |
38 |
|
T117 |
48 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T63 |
10 |
|
T116 |
8 |
|
T117 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T63 |
33 |
|
T116 |
44 |
|
T117 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T63 |
11 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T63 |
28 |
|
T116 |
38 |
|
T117 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T63 |
10 |
|
T116 |
8 |
|
T117 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T63 |
32 |
|
T116 |
44 |
|
T117 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T63 |
11 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T63 |
28 |
|
T116 |
35 |
|
T117 |
45 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T63 |
10 |
|
T116 |
8 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T63 |
32 |
|
T116 |
44 |
|
T117 |
42 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T63 |
11 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T63 |
27 |
|
T116 |
34 |
|
T117 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T63 |
10 |
|
T116 |
8 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T63 |
31 |
|
T116 |
44 |
|
T117 |
40 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T63 |
11 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T63 |
25 |
|
T116 |
33 |
|
T117 |
40 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T63 |
10 |
|
T116 |
8 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T63 |
31 |
|
T116 |
43 |
|
T117 |
40 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T63 |
11 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T63 |
25 |
|
T116 |
33 |
|
T117 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T63 |
10 |
|
T116 |
8 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T63 |
30 |
|
T116 |
43 |
|
T117 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T63 |
11 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T63 |
25 |
|
T116 |
31 |
|
T117 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T63 |
10 |
|
T116 |
8 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T63 |
30 |
|
T116 |
43 |
|
T117 |
37 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T63 |
11 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T63 |
25 |
|
T116 |
30 |
|
T117 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T63 |
10 |
|
T116 |
8 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T63 |
29 |
|
T116 |
43 |
|
T117 |
37 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T63 |
11 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1144 |
1 |
|
|
T63 |
23 |
|
T116 |
30 |
|
T117 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T63 |
10 |
|
T116 |
8 |
|
T117 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T63 |
29 |
|
T116 |
41 |
|
T117 |
37 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59586 |
1 |
|
|
T63 |
1484 |
|
T116 |
1052 |
|
T117 |
1259 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39625 |
1 |
|
|
T63 |
377 |
|
T116 |
847 |
|
T117 |
1022 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56527 |
1 |
|
|
T63 |
1100 |
|
T116 |
836 |
|
T117 |
2542 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46218 |
1 |
|
|
T63 |
1163 |
|
T116 |
2104 |
|
T117 |
598 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T63 |
20 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T63 |
19 |
|
T116 |
52 |
|
T117 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T63 |
20 |
|
T116 |
19 |
|
T117 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T63 |
19 |
|
T116 |
49 |
|
T117 |
43 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T63 |
20 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T63 |
19 |
|
T116 |
52 |
|
T117 |
43 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T63 |
20 |
|
T116 |
19 |
|
T117 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T63 |
18 |
|
T116 |
47 |
|
T117 |
42 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T63 |
20 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T63 |
19 |
|
T116 |
50 |
|
T117 |
43 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T63 |
20 |
|
T116 |
18 |
|
T117 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T63 |
18 |
|
T116 |
48 |
|
T117 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T63 |
20 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T63 |
18 |
|
T116 |
50 |
|
T117 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T63 |
20 |
|
T116 |
18 |
|
T117 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T63 |
18 |
|
T116 |
47 |
|
T117 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T63 |
20 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T63 |
18 |
|
T116 |
49 |
|
T117 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T63 |
20 |
|
T116 |
18 |
|
T117 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T63 |
18 |
|
T116 |
47 |
|
T117 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T63 |
20 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T63 |
18 |
|
T116 |
47 |
|
T117 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T63 |
20 |
|
T116 |
18 |
|
T117 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T63 |
18 |
|
T116 |
46 |
|
T117 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T63 |
20 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T63 |
18 |
|
T116 |
46 |
|
T117 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T63 |
20 |
|
T116 |
18 |
|
T117 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T63 |
18 |
|
T116 |
44 |
|
T117 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T63 |
20 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T63 |
18 |
|
T116 |
44 |
|
T117 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T63 |
20 |
|
T116 |
18 |
|
T117 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T63 |
18 |
|
T116 |
44 |
|
T117 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T63 |
20 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T63 |
18 |
|
T116 |
43 |
|
T117 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T63 |
20 |
|
T116 |
18 |
|
T117 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T63 |
17 |
|
T116 |
40 |
|
T117 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T63 |
20 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T63 |
17 |
|
T116 |
41 |
|
T117 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T63 |
20 |
|
T116 |
18 |
|
T117 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T63 |
17 |
|
T116 |
40 |
|
T117 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T63 |
20 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T63 |
15 |
|
T116 |
39 |
|
T117 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T63 |
20 |
|
T116 |
18 |
|
T117 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T63 |
17 |
|
T116 |
39 |
|
T117 |
33 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T63 |
20 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T63 |
12 |
|
T116 |
39 |
|
T117 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T63 |
20 |
|
T116 |
18 |
|
T117 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T63 |
17 |
|
T116 |
39 |
|
T117 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T63 |
20 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T63 |
12 |
|
T116 |
38 |
|
T117 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T63 |
20 |
|
T116 |
18 |
|
T117 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T63 |
16 |
|
T116 |
39 |
|
T117 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T63 |
20 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T63 |
12 |
|
T116 |
37 |
|
T117 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T63 |
20 |
|
T116 |
18 |
|
T117 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T63 |
15 |
|
T116 |
37 |
|
T117 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T63 |
20 |
|
T116 |
15 |
|
T117 |
23 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1153 |
1 |
|
|
T63 |
12 |
|
T116 |
36 |
|
T117 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T63 |
20 |
|
T116 |
18 |
|
T117 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1141 |
1 |
|
|
T63 |
14 |
|
T116 |
36 |
|
T117 |
26 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54546 |
1 |
|
|
T63 |
896 |
|
T116 |
1176 |
|
T117 |
1382 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45066 |
1 |
|
|
T63 |
861 |
|
T116 |
934 |
|
T117 |
1238 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56594 |
1 |
|
|
T63 |
793 |
|
T116 |
2160 |
|
T117 |
1928 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45367 |
1 |
|
|
T63 |
1397 |
|
T116 |
946 |
|
T117 |
994 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T63 |
13 |
|
T116 |
17 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T63 |
33 |
|
T116 |
34 |
|
T117 |
52 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T63 |
32 |
|
T116 |
37 |
|
T117 |
52 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T63 |
13 |
|
T116 |
17 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T63 |
33 |
|
T116 |
34 |
|
T117 |
51 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1618 |
1 |
|
|
T63 |
32 |
|
T116 |
37 |
|
T117 |
51 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T63 |
13 |
|
T116 |
17 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T63 |
31 |
|
T116 |
34 |
|
T117 |
51 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T63 |
31 |
|
T116 |
37 |
|
T117 |
51 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T63 |
13 |
|
T116 |
17 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T63 |
31 |
|
T116 |
34 |
|
T117 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T63 |
31 |
|
T116 |
36 |
|
T117 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T63 |
13 |
|
T116 |
17 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T63 |
31 |
|
T116 |
34 |
|
T117 |
49 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T63 |
31 |
|
T116 |
35 |
|
T117 |
49 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T63 |
13 |
|
T116 |
17 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T63 |
31 |
|
T116 |
32 |
|
T117 |
49 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T63 |
31 |
|
T116 |
34 |
|
T117 |
48 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T63 |
13 |
|
T116 |
17 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T63 |
30 |
|
T116 |
30 |
|
T117 |
49 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T63 |
31 |
|
T116 |
34 |
|
T117 |
47 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T63 |
13 |
|
T116 |
17 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T63 |
29 |
|
T116 |
29 |
|
T117 |
48 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
12 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T63 |
31 |
|
T116 |
33 |
|
T117 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T63 |
13 |
|
T116 |
17 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T63 |
29 |
|
T116 |
29 |
|
T117 |
47 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T63 |
29 |
|
T116 |
32 |
|
T117 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T63 |
13 |
|
T116 |
17 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T63 |
26 |
|
T116 |
28 |
|
T117 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T63 |
28 |
|
T116 |
31 |
|
T117 |
43 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T63 |
13 |
|
T116 |
17 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T63 |
26 |
|
T116 |
28 |
|
T117 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T63 |
28 |
|
T116 |
31 |
|
T117 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T63 |
13 |
|
T116 |
17 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T63 |
26 |
|
T116 |
28 |
|
T117 |
45 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T63 |
28 |
|
T116 |
31 |
|
T117 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T63 |
13 |
|
T116 |
17 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T63 |
26 |
|
T116 |
28 |
|
T117 |
45 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T63 |
27 |
|
T116 |
30 |
|
T117 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T63 |
13 |
|
T116 |
17 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T63 |
26 |
|
T116 |
28 |
|
T117 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T63 |
27 |
|
T116 |
30 |
|
T117 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T63 |
13 |
|
T116 |
17 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T63 |
25 |
|
T116 |
26 |
|
T117 |
43 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T63 |
14 |
|
T116 |
14 |
|
T117 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T63 |
25 |
|
T116 |
30 |
|
T117 |
37 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54312 |
1 |
|
|
T63 |
958 |
|
T116 |
1350 |
|
T117 |
1093 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46713 |
1 |
|
|
T63 |
1297 |
|
T116 |
605 |
|
T117 |
969 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55663 |
1 |
|
|
T63 |
1152 |
|
T116 |
2306 |
|
T117 |
2050 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44860 |
1 |
|
|
T63 |
597 |
|
T116 |
913 |
|
T117 |
1111 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T63 |
20 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T63 |
25 |
|
T116 |
33 |
|
T117 |
57 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T63 |
22 |
|
T116 |
21 |
|
T117 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T63 |
22 |
|
T116 |
32 |
|
T117 |
57 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T63 |
20 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T63 |
25 |
|
T116 |
33 |
|
T117 |
55 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T63 |
22 |
|
T116 |
21 |
|
T117 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T63 |
22 |
|
T116 |
32 |
|
T117 |
55 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T63 |
20 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T63 |
23 |
|
T116 |
33 |
|
T117 |
55 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T63 |
22 |
|
T116 |
20 |
|
T117 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T63 |
21 |
|
T116 |
32 |
|
T117 |
53 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T63 |
20 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T63 |
23 |
|
T116 |
32 |
|
T117 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T63 |
22 |
|
T116 |
20 |
|
T117 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T63 |
19 |
|
T116 |
32 |
|
T117 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T63 |
20 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T63 |
22 |
|
T116 |
30 |
|
T117 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T63 |
22 |
|
T116 |
20 |
|
T117 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T63 |
19 |
|
T116 |
32 |
|
T117 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T63 |
20 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T63 |
22 |
|
T116 |
29 |
|
T117 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T63 |
22 |
|
T116 |
20 |
|
T117 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T63 |
19 |
|
T116 |
32 |
|
T117 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T63 |
20 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T63 |
22 |
|
T116 |
28 |
|
T117 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T63 |
22 |
|
T116 |
20 |
|
T117 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T63 |
19 |
|
T116 |
32 |
|
T117 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T63 |
20 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T63 |
22 |
|
T116 |
26 |
|
T117 |
48 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T63 |
22 |
|
T116 |
20 |
|
T117 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T63 |
17 |
|
T116 |
32 |
|
T117 |
52 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T63 |
20 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T63 |
21 |
|
T116 |
26 |
|
T117 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T63 |
22 |
|
T116 |
20 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T63 |
17 |
|
T116 |
31 |
|
T117 |
51 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T63 |
20 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T63 |
20 |
|
T116 |
26 |
|
T117 |
42 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T63 |
22 |
|
T116 |
20 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T63 |
17 |
|
T116 |
30 |
|
T117 |
50 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T63 |
20 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T63 |
19 |
|
T116 |
25 |
|
T117 |
39 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T63 |
22 |
|
T116 |
20 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T63 |
17 |
|
T116 |
29 |
|
T117 |
49 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T63 |
20 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T63 |
19 |
|
T116 |
25 |
|
T117 |
38 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T63 |
22 |
|
T116 |
20 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T63 |
16 |
|
T116 |
29 |
|
T117 |
47 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T63 |
20 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1175 |
1 |
|
|
T63 |
19 |
|
T116 |
25 |
|
T117 |
35 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T63 |
22 |
|
T116 |
20 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T63 |
16 |
|
T116 |
29 |
|
T117 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T63 |
20 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1155 |
1 |
|
|
T63 |
19 |
|
T116 |
25 |
|
T117 |
34 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T63 |
22 |
|
T116 |
20 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T63 |
16 |
|
T116 |
28 |
|
T117 |
45 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T63 |
20 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1118 |
1 |
|
|
T63 |
19 |
|
T116 |
25 |
|
T117 |
32 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T63 |
22 |
|
T116 |
20 |
|
T117 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1181 |
1 |
|
|
T63 |
16 |
|
T116 |
27 |
|
T117 |
45 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57975 |
1 |
|
|
T63 |
1115 |
|
T116 |
908 |
|
T117 |
1254 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44554 |
1 |
|
|
T63 |
369 |
|
T116 |
1929 |
|
T117 |
1002 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58122 |
1 |
|
|
T63 |
1901 |
|
T116 |
786 |
|
T117 |
1351 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41240 |
1 |
|
|
T63 |
613 |
|
T116 |
1268 |
|
T117 |
1822 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T63 |
15 |
|
T116 |
16 |
|
T117 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T63 |
29 |
|
T116 |
50 |
|
T117 |
43 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T63 |
18 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T63 |
26 |
|
T116 |
52 |
|
T117 |
46 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T63 |
15 |
|
T116 |
16 |
|
T117 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T63 |
28 |
|
T116 |
50 |
|
T117 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T63 |
18 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T63 |
26 |
|
T116 |
50 |
|
T117 |
46 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T63 |
15 |
|
T116 |
16 |
|
T117 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T63 |
28 |
|
T116 |
50 |
|
T117 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T63 |
18 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T63 |
26 |
|
T116 |
48 |
|
T117 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T63 |
15 |
|
T116 |
16 |
|
T117 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T63 |
28 |
|
T116 |
50 |
|
T117 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T63 |
18 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T63 |
26 |
|
T116 |
47 |
|
T117 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T63 |
15 |
|
T116 |
16 |
|
T117 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T63 |
28 |
|
T116 |
50 |
|
T117 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T63 |
18 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T63 |
26 |
|
T116 |
45 |
|
T117 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T63 |
15 |
|
T116 |
16 |
|
T117 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T63 |
28 |
|
T116 |
47 |
|
T117 |
40 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T63 |
18 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T63 |
25 |
|
T116 |
43 |
|
T117 |
43 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T63 |
15 |
|
T116 |
16 |
|
T117 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T63 |
26 |
|
T116 |
47 |
|
T117 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T63 |
18 |
|
T116 |
13 |
|
T117 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T63 |
25 |
|
T116 |
43 |
|
T117 |
43 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T63 |
15 |
|
T116 |
16 |
|
T117 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T63 |
25 |
|
T116 |
46 |
|
T117 |
37 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T63 |
18 |
|
T116 |
13 |
|
T117 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T63 |
25 |
|
T116 |
40 |
|
T117 |
43 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T63 |
15 |
|
T116 |
16 |
|
T117 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T63 |
24 |
|
T116 |
46 |
|
T117 |
37 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T63 |
18 |
|
T116 |
13 |
|
T117 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T63 |
25 |
|
T116 |
38 |
|
T117 |
41 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T63 |
15 |
|
T116 |
16 |
|
T117 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T63 |
23 |
|
T116 |
46 |
|
T117 |
36 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T63 |
18 |
|
T116 |
13 |
|
T117 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T63 |
25 |
|
T116 |
36 |
|
T117 |
40 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T63 |
15 |
|
T116 |
16 |
|
T117 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T63 |
23 |
|
T116 |
45 |
|
T117 |
35 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T63 |
18 |
|
T116 |
13 |
|
T117 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T63 |
25 |
|
T116 |
34 |
|
T117 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T63 |
15 |
|
T116 |
16 |
|
T117 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T63 |
20 |
|
T116 |
45 |
|
T117 |
34 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T63 |
18 |
|
T116 |
13 |
|
T117 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T63 |
24 |
|
T116 |
34 |
|
T117 |
36 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T63 |
15 |
|
T116 |
16 |
|
T117 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T63 |
16 |
|
T116 |
44 |
|
T117 |
34 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T63 |
18 |
|
T116 |
13 |
|
T117 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T63 |
24 |
|
T116 |
34 |
|
T117 |
35 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T63 |
15 |
|
T116 |
16 |
|
T117 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T63 |
16 |
|
T116 |
42 |
|
T117 |
34 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T63 |
18 |
|
T116 |
13 |
|
T117 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T63 |
24 |
|
T116 |
33 |
|
T117 |
34 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T63 |
15 |
|
T116 |
16 |
|
T117 |
23 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T63 |
16 |
|
T116 |
41 |
|
T117 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T63 |
18 |
|
T116 |
13 |
|
T117 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1153 |
1 |
|
|
T63 |
24 |
|
T116 |
33 |
|
T117 |
34 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56234 |
1 |
|
|
T63 |
762 |
|
T116 |
1231 |
|
T117 |
1360 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48434 |
1 |
|
|
T63 |
669 |
|
T116 |
1760 |
|
T117 |
992 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54461 |
1 |
|
|
T63 |
1683 |
|
T116 |
989 |
|
T117 |
1397 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42274 |
1 |
|
|
T63 |
868 |
|
T116 |
920 |
|
T117 |
1724 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T63 |
15 |
|
T116 |
14 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T63 |
31 |
|
T116 |
51 |
|
T117 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T63 |
16 |
|
T116 |
20 |
|
T117 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T63 |
30 |
|
T116 |
45 |
|
T117 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T63 |
15 |
|
T116 |
14 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T63 |
31 |
|
T116 |
51 |
|
T117 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T63 |
16 |
|
T116 |
20 |
|
T117 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T63 |
29 |
|
T116 |
45 |
|
T117 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T63 |
15 |
|
T116 |
14 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T63 |
30 |
|
T116 |
50 |
|
T117 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T63 |
16 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T63 |
29 |
|
T116 |
46 |
|
T117 |
41 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T63 |
15 |
|
T116 |
14 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T63 |
29 |
|
T116 |
46 |
|
T117 |
41 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T63 |
16 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T63 |
28 |
|
T116 |
46 |
|
T117 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T63 |
15 |
|
T116 |
14 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T63 |
29 |
|
T116 |
44 |
|
T117 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T63 |
16 |
|
T116 |
19 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T63 |
28 |
|
T116 |
45 |
|
T117 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T63 |
15 |
|
T116 |
14 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T63 |
26 |
|
T116 |
42 |
|
T117 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T63 |
16 |
|
T116 |
19 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T63 |
28 |
|
T116 |
44 |
|
T117 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T63 |
15 |
|
T116 |
14 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T63 |
26 |
|
T116 |
42 |
|
T117 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T63 |
16 |
|
T116 |
19 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T63 |
28 |
|
T116 |
43 |
|
T117 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T63 |
15 |
|
T116 |
14 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T63 |
26 |
|
T116 |
41 |
|
T117 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T63 |
16 |
|
T116 |
19 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T63 |
27 |
|
T116 |
41 |
|
T117 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T63 |
15 |
|
T116 |
14 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T63 |
26 |
|
T116 |
40 |
|
T117 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T63 |
16 |
|
T116 |
19 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T63 |
25 |
|
T116 |
39 |
|
T117 |
36 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T63 |
15 |
|
T116 |
14 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T63 |
26 |
|
T116 |
40 |
|
T117 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T63 |
16 |
|
T116 |
19 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T63 |
23 |
|
T116 |
39 |
|
T117 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T63 |
15 |
|
T116 |
14 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T63 |
25 |
|
T116 |
40 |
|
T117 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T63 |
16 |
|
T116 |
19 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T63 |
22 |
|
T116 |
38 |
|
T117 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T63 |
15 |
|
T116 |
14 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T63 |
25 |
|
T116 |
39 |
|
T117 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T63 |
16 |
|
T116 |
19 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T63 |
21 |
|
T116 |
36 |
|
T117 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T63 |
15 |
|
T116 |
14 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T63 |
24 |
|
T116 |
39 |
|
T117 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T63 |
16 |
|
T116 |
19 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T63 |
21 |
|
T116 |
35 |
|
T117 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T63 |
15 |
|
T116 |
14 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T63 |
24 |
|
T116 |
36 |
|
T117 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T63 |
16 |
|
T116 |
19 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1212 |
1 |
|
|
T63 |
20 |
|
T116 |
33 |
|
T117 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T63 |
15 |
|
T116 |
14 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T63 |
23 |
|
T116 |
36 |
|
T117 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T63 |
16 |
|
T116 |
19 |
|
T117 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1185 |
1 |
|
|
T63 |
20 |
|
T116 |
32 |
|
T117 |
31 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58637 |
1 |
|
|
T63 |
876 |
|
T116 |
1788 |
|
T117 |
1173 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46324 |
1 |
|
|
T63 |
1666 |
|
T116 |
1144 |
|
T117 |
2103 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53123 |
1 |
|
|
T63 |
919 |
|
T116 |
1008 |
|
T117 |
845 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43037 |
1 |
|
|
T63 |
535 |
|
T116 |
1097 |
|
T117 |
1370 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T63 |
32 |
|
T116 |
47 |
|
T117 |
54 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T63 |
14 |
|
T116 |
16 |
|
T117 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T63 |
32 |
|
T116 |
44 |
|
T117 |
58 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T63 |
32 |
|
T116 |
47 |
|
T117 |
53 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T63 |
14 |
|
T116 |
16 |
|
T117 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T63 |
31 |
|
T116 |
41 |
|
T117 |
56 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T63 |
31 |
|
T116 |
45 |
|
T117 |
52 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T63 |
29 |
|
T116 |
41 |
|
T117 |
56 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T63 |
31 |
|
T116 |
45 |
|
T117 |
52 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T63 |
29 |
|
T116 |
40 |
|
T117 |
55 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T63 |
30 |
|
T116 |
44 |
|
T117 |
51 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T63 |
28 |
|
T116 |
39 |
|
T117 |
54 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T63 |
15 |
|
T116 |
13 |
|
T117 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T63 |
29 |
|
T116 |
44 |
|
T117 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T63 |
26 |
|
T116 |
38 |
|
T117 |
54 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T63 |
14 |
|
T116 |
13 |
|
T117 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T63 |
28 |
|
T116 |
44 |
|
T117 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T63 |
25 |
|
T116 |
36 |
|
T117 |
53 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T63 |
14 |
|
T116 |
13 |
|
T117 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T63 |
28 |
|
T116 |
44 |
|
T117 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T63 |
25 |
|
T116 |
35 |
|
T117 |
52 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T63 |
14 |
|
T116 |
13 |
|
T117 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T63 |
28 |
|
T116 |
44 |
|
T117 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T63 |
23 |
|
T116 |
35 |
|
T117 |
52 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T63 |
14 |
|
T116 |
13 |
|
T117 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T63 |
27 |
|
T116 |
44 |
|
T117 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T63 |
22 |
|
T116 |
34 |
|
T117 |
51 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T63 |
14 |
|
T116 |
13 |
|
T117 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T63 |
27 |
|
T116 |
42 |
|
T117 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T63 |
22 |
|
T116 |
34 |
|
T117 |
50 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T63 |
14 |
|
T116 |
13 |
|
T117 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T63 |
27 |
|
T116 |
41 |
|
T117 |
42 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T63 |
22 |
|
T116 |
33 |
|
T117 |
50 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T63 |
14 |
|
T116 |
13 |
|
T117 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T63 |
26 |
|
T116 |
39 |
|
T117 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T63 |
21 |
|
T116 |
31 |
|
T117 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T63 |
14 |
|
T116 |
13 |
|
T117 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T63 |
26 |
|
T116 |
37 |
|
T117 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T63 |
21 |
|
T116 |
29 |
|
T117 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T63 |
14 |
|
T116 |
13 |
|
T117 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1159 |
1 |
|
|
T63 |
26 |
|
T116 |
36 |
|
T117 |
34 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T63 |
21 |
|
T116 |
29 |
|
T117 |
47 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55077 |
1 |
|
|
T63 |
1194 |
|
T116 |
1508 |
|
T117 |
1563 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42225 |
1 |
|
|
T63 |
587 |
|
T116 |
678 |
|
T117 |
1823 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57715 |
1 |
|
|
T63 |
1712 |
|
T116 |
1388 |
|
T117 |
999 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46981 |
1 |
|
|
T63 |
485 |
|
T116 |
1457 |
|
T117 |
1129 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T63 |
15 |
|
T116 |
23 |
|
T117 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T63 |
31 |
|
T116 |
35 |
|
T117 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T63 |
18 |
|
T116 |
22 |
|
T117 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T63 |
28 |
|
T116 |
37 |
|
T117 |
54 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T63 |
15 |
|
T116 |
23 |
|
T117 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T63 |
30 |
|
T116 |
35 |
|
T117 |
45 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T63 |
18 |
|
T116 |
22 |
|
T117 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T63 |
26 |
|
T116 |
35 |
|
T117 |
54 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T63 |
15 |
|
T116 |
23 |
|
T117 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T63 |
30 |
|
T116 |
35 |
|
T117 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T63 |
18 |
|
T116 |
21 |
|
T117 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T63 |
26 |
|
T116 |
35 |
|
T117 |
53 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T63 |
15 |
|
T116 |
23 |
|
T117 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T63 |
30 |
|
T116 |
35 |
|
T117 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T63 |
18 |
|
T116 |
21 |
|
T117 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T63 |
26 |
|
T116 |
35 |
|
T117 |
52 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T63 |
15 |
|
T116 |
23 |
|
T117 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T63 |
29 |
|
T116 |
35 |
|
T117 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T63 |
18 |
|
T116 |
21 |
|
T117 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T63 |
24 |
|
T116 |
35 |
|
T117 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T63 |
15 |
|
T116 |
23 |
|
T117 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T63 |
28 |
|
T116 |
35 |
|
T117 |
41 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T63 |
18 |
|
T116 |
21 |
|
T117 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T63 |
24 |
|
T116 |
33 |
|
T117 |
50 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T63 |
15 |
|
T116 |
23 |
|
T117 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T63 |
27 |
|
T116 |
34 |
|
T117 |
39 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T63 |
18 |
|
T116 |
21 |
|
T117 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T63 |
24 |
|
T116 |
31 |
|
T117 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T63 |
15 |
|
T116 |
23 |
|
T117 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T63 |
27 |
|
T116 |
34 |
|
T117 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T63 |
18 |
|
T116 |
21 |
|
T117 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T63 |
23 |
|
T116 |
31 |
|
T117 |
49 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T63 |
15 |
|
T116 |
23 |
|
T117 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T63 |
27 |
|
T116 |
34 |
|
T117 |
36 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T63 |
18 |
|
T116 |
21 |
|
T117 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T63 |
22 |
|
T116 |
31 |
|
T117 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T63 |
15 |
|
T116 |
23 |
|
T117 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T63 |
27 |
|
T116 |
33 |
|
T117 |
35 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T63 |
18 |
|
T116 |
21 |
|
T117 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T63 |
22 |
|
T116 |
29 |
|
T117 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T63 |
15 |
|
T116 |
23 |
|
T117 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T63 |
27 |
|
T116 |
33 |
|
T117 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T63 |
18 |
|
T116 |
21 |
|
T117 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T63 |
21 |
|
T116 |
27 |
|
T117 |
45 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T63 |
15 |
|
T116 |
23 |
|
T117 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T63 |
26 |
|
T116 |
31 |
|
T117 |
32 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T63 |
18 |
|
T116 |
21 |
|
T117 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T63 |
19 |
|
T116 |
27 |
|
T117 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T63 |
15 |
|
T116 |
23 |
|
T117 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T63 |
26 |
|
T116 |
30 |
|
T117 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T63 |
18 |
|
T116 |
21 |
|
T117 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T63 |
19 |
|
T116 |
23 |
|
T117 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T63 |
15 |
|
T116 |
23 |
|
T117 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T63 |
25 |
|
T116 |
29 |
|
T117 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T63 |
18 |
|
T116 |
21 |
|
T117 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T63 |
19 |
|
T116 |
22 |
|
T117 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T63 |
15 |
|
T116 |
23 |
|
T117 |
19 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1116 |
1 |
|
|
T63 |
24 |
|
T116 |
27 |
|
T117 |
28 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T63 |
18 |
|
T116 |
21 |
|
T117 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T63 |
17 |
|
T116 |
22 |
|
T117 |
41 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57755 |
1 |
|
|
T63 |
1232 |
|
T116 |
877 |
|
T117 |
976 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44706 |
1 |
|
|
T63 |
1154 |
|
T116 |
2008 |
|
T117 |
997 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52213 |
1 |
|
|
T63 |
1334 |
|
T116 |
1141 |
|
T117 |
1056 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47365 |
1 |
|
|
T63 |
392 |
|
T116 |
1075 |
|
T117 |
2360 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T63 |
21 |
|
T116 |
11 |
|
T117 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1599 |
1 |
|
|
T63 |
19 |
|
T116 |
46 |
|
T117 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T63 |
19 |
|
T116 |
18 |
|
T117 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T63 |
20 |
|
T116 |
39 |
|
T117 |
55 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T63 |
21 |
|
T116 |
11 |
|
T117 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T63 |
19 |
|
T116 |
46 |
|
T117 |
49 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T63 |
19 |
|
T116 |
18 |
|
T117 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T63 |
20 |
|
T116 |
38 |
|
T117 |
54 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T63 |
21 |
|
T116 |
11 |
|
T117 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T63 |
19 |
|
T116 |
44 |
|
T117 |
48 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T63 |
19 |
|
T116 |
18 |
|
T117 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1543 |
1 |
|
|
T63 |
20 |
|
T116 |
38 |
|
T117 |
54 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T63 |
21 |
|
T116 |
11 |
|
T117 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T63 |
18 |
|
T116 |
43 |
|
T117 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T63 |
19 |
|
T116 |
18 |
|
T117 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T63 |
20 |
|
T116 |
37 |
|
T117 |
53 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T63 |
21 |
|
T116 |
11 |
|
T117 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T63 |
18 |
|
T116 |
42 |
|
T117 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T63 |
19 |
|
T116 |
18 |
|
T117 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T63 |
20 |
|
T116 |
36 |
|
T117 |
53 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T63 |
21 |
|
T116 |
11 |
|
T117 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T63 |
18 |
|
T116 |
40 |
|
T117 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T63 |
19 |
|
T116 |
18 |
|
T117 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T63 |
20 |
|
T116 |
36 |
|
T117 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T63 |
21 |
|
T116 |
11 |
|
T117 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T63 |
18 |
|
T116 |
40 |
|
T117 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T63 |
19 |
|
T116 |
18 |
|
T117 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T63 |
19 |
|
T116 |
36 |
|
T117 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T63 |
21 |
|
T116 |
11 |
|
T117 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T63 |
17 |
|
T116 |
39 |
|
T117 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T63 |
19 |
|
T116 |
18 |
|
T117 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T63 |
18 |
|
T116 |
36 |
|
T117 |
51 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T63 |
21 |
|
T116 |
11 |
|
T117 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T63 |
17 |
|
T116 |
38 |
|
T117 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T63 |
19 |
|
T116 |
18 |
|
T117 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T63 |
16 |
|
T116 |
34 |
|
T117 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T63 |
21 |
|
T116 |
11 |
|
T117 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T63 |
17 |
|
T116 |
36 |
|
T117 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T63 |
19 |
|
T116 |
18 |
|
T117 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T63 |
15 |
|
T116 |
33 |
|
T117 |
49 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T63 |
21 |
|
T116 |
11 |
|
T117 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T63 |
17 |
|
T116 |
36 |
|
T117 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T63 |
19 |
|
T116 |
18 |
|
T117 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T63 |
14 |
|
T116 |
32 |
|
T117 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T63 |
21 |
|
T116 |
11 |
|
T117 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T63 |
16 |
|
T116 |
35 |
|
T117 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T63 |
19 |
|
T116 |
18 |
|
T117 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T63 |
14 |
|
T116 |
32 |
|
T117 |
44 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T63 |
21 |
|
T116 |
11 |
|
T117 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T63 |
15 |
|
T116 |
35 |
|
T117 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T63 |
19 |
|
T116 |
18 |
|
T117 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T63 |
14 |
|
T116 |
32 |
|
T117 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T63 |
21 |
|
T116 |
11 |
|
T117 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T63 |
15 |
|
T116 |
34 |
|
T117 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T63 |
19 |
|
T116 |
18 |
|
T117 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T63 |
14 |
|
T116 |
30 |
|
T117 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T63 |
21 |
|
T116 |
11 |
|
T117 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1156 |
1 |
|
|
T63 |
14 |
|
T116 |
33 |
|
T117 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T63 |
19 |
|
T116 |
18 |
|
T117 |
14 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1174 |
1 |
|
|
T63 |
14 |
|
T116 |
29 |
|
T117 |
42 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55467 |
1 |
|
|
T63 |
1521 |
|
T116 |
910 |
|
T117 |
2482 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46930 |
1 |
|
|
T63 |
904 |
|
T116 |
1047 |
|
T117 |
1189 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52051 |
1 |
|
|
T63 |
990 |
|
T116 |
1910 |
|
T117 |
944 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46489 |
1 |
|
|
T63 |
477 |
|
T116 |
1042 |
|
T117 |
926 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T63 |
17 |
|
T116 |
13 |
|
T117 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T63 |
31 |
|
T116 |
50 |
|
T117 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T63 |
17 |
|
T116 |
15 |
|
T117 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T63 |
30 |
|
T116 |
49 |
|
T117 |
47 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T63 |
17 |
|
T116 |
13 |
|
T117 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T63 |
31 |
|
T116 |
50 |
|
T117 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T63 |
17 |
|
T116 |
15 |
|
T117 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T63 |
30 |
|
T116 |
48 |
|
T117 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T63 |
17 |
|
T116 |
13 |
|
T117 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T63 |
31 |
|
T116 |
50 |
|
T117 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T63 |
17 |
|
T116 |
14 |
|
T117 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T63 |
30 |
|
T116 |
49 |
|
T117 |
45 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T63 |
17 |
|
T116 |
13 |
|
T117 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T63 |
31 |
|
T116 |
49 |
|
T117 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T63 |
17 |
|
T116 |
14 |
|
T117 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T63 |
30 |
|
T116 |
48 |
|
T117 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T63 |
17 |
|
T116 |
13 |
|
T117 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T63 |
31 |
|
T116 |
48 |
|
T117 |
45 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T63 |
17 |
|
T116 |
14 |
|
T117 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T63 |
27 |
|
T116 |
46 |
|
T117 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T63 |
17 |
|
T116 |
13 |
|
T117 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T63 |
31 |
|
T116 |
48 |
|
T117 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T63 |
17 |
|
T116 |
14 |
|
T117 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T63 |
27 |
|
T116 |
44 |
|
T117 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T63 |
17 |
|
T116 |
13 |
|
T117 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T63 |
30 |
|
T116 |
47 |
|
T117 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T63 |
17 |
|
T116 |
14 |
|
T117 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T63 |
26 |
|
T116 |
43 |
|
T117 |
42 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T63 |
17 |
|
T116 |
13 |
|
T117 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T63 |
30 |
|
T116 |
47 |
|
T117 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T63 |
17 |
|
T116 |
14 |
|
T117 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T63 |
26 |
|
T116 |
43 |
|
T117 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T63 |
17 |
|
T116 |
13 |
|
T117 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T63 |
30 |
|
T116 |
46 |
|
T117 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T63 |
17 |
|
T116 |
14 |
|
T117 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T63 |
23 |
|
T116 |
42 |
|
T117 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T63 |
17 |
|
T116 |
13 |
|
T117 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T63 |
30 |
|
T116 |
46 |
|
T117 |
42 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T63 |
17 |
|
T116 |
14 |
|
T117 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T63 |
23 |
|
T116 |
41 |
|
T117 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T63 |
17 |
|
T116 |
13 |
|
T117 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T63 |
30 |
|
T116 |
46 |
|
T117 |
39 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T63 |
17 |
|
T116 |
14 |
|
T117 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T63 |
21 |
|
T116 |
40 |
|
T117 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T63 |
17 |
|
T116 |
13 |
|
T117 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T63 |
30 |
|
T116 |
44 |
|
T117 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T63 |
17 |
|
T116 |
14 |
|
T117 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T63 |
20 |
|
T116 |
38 |
|
T117 |
35 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T63 |
17 |
|
T116 |
13 |
|
T117 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T63 |
30 |
|
T116 |
42 |
|
T117 |
37 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T63 |
17 |
|
T116 |
14 |
|
T117 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T63 |
20 |
|
T116 |
36 |
|
T117 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T63 |
17 |
|
T116 |
13 |
|
T117 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T63 |
30 |
|
T116 |
40 |
|
T117 |
36 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T63 |
17 |
|
T116 |
14 |
|
T117 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T63 |
19 |
|
T116 |
34 |
|
T117 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T63 |
17 |
|
T116 |
13 |
|
T117 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T63 |
29 |
|
T116 |
37 |
|
T117 |
36 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T63 |
17 |
|
T116 |
14 |
|
T117 |
16 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1182 |
1 |
|
|
T63 |
18 |
|
T116 |
34 |
|
T117 |
32 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59148 |
1 |
|
|
T63 |
927 |
|
T116 |
944 |
|
T117 |
2311 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46680 |
1 |
|
|
T63 |
1311 |
|
T116 |
1697 |
|
T117 |
1211 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52451 |
1 |
|
|
T63 |
725 |
|
T116 |
1014 |
|
T117 |
806 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43205 |
1 |
|
|
T63 |
879 |
|
T116 |
1182 |
|
T117 |
1003 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T63 |
38 |
|
T116 |
48 |
|
T117 |
58 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T63 |
36 |
|
T116 |
51 |
|
T117 |
58 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T63 |
36 |
|
T116 |
48 |
|
T117 |
58 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T63 |
36 |
|
T116 |
51 |
|
T117 |
57 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T63 |
36 |
|
T116 |
47 |
|
T117 |
57 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T63 |
35 |
|
T116 |
51 |
|
T117 |
55 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T63 |
36 |
|
T116 |
46 |
|
T117 |
57 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T63 |
35 |
|
T116 |
51 |
|
T117 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T63 |
35 |
|
T116 |
45 |
|
T117 |
57 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T63 |
35 |
|
T116 |
51 |
|
T117 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T63 |
33 |
|
T116 |
44 |
|
T117 |
57 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T63 |
35 |
|
T116 |
50 |
|
T117 |
50 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T63 |
31 |
|
T116 |
43 |
|
T117 |
55 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T63 |
35 |
|
T116 |
47 |
|
T117 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T63 |
31 |
|
T116 |
41 |
|
T117 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T63 |
35 |
|
T116 |
45 |
|
T117 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T63 |
31 |
|
T116 |
40 |
|
T117 |
49 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T63 |
35 |
|
T116 |
44 |
|
T117 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T63 |
30 |
|
T116 |
40 |
|
T117 |
49 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T63 |
35 |
|
T116 |
43 |
|
T117 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T63 |
29 |
|
T116 |
39 |
|
T117 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T63 |
34 |
|
T116 |
42 |
|
T117 |
42 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T63 |
26 |
|
T116 |
35 |
|
T117 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T63 |
34 |
|
T116 |
42 |
|
T117 |
39 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T63 |
24 |
|
T116 |
34 |
|
T117 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T63 |
34 |
|
T116 |
42 |
|
T117 |
38 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T63 |
22 |
|
T116 |
34 |
|
T117 |
42 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T63 |
34 |
|
T116 |
42 |
|
T117 |
38 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T63 |
20 |
|
T116 |
32 |
|
T117 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
15 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T63 |
34 |
|
T116 |
41 |
|
T117 |
38 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53681 |
1 |
|
|
T63 |
818 |
|
T116 |
1002 |
|
T117 |
2415 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43969 |
1 |
|
|
T63 |
600 |
|
T116 |
963 |
|
T117 |
849 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56840 |
1 |
|
|
T63 |
980 |
|
T116 |
1279 |
|
T117 |
1039 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46966 |
1 |
|
|
T63 |
1452 |
|
T116 |
1797 |
|
T117 |
1046 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T63 |
15 |
|
T116 |
12 |
|
T117 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T63 |
35 |
|
T116 |
47 |
|
T117 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T63 |
16 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T63 |
34 |
|
T116 |
46 |
|
T117 |
50 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T63 |
15 |
|
T116 |
12 |
|
T117 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T63 |
35 |
|
T116 |
46 |
|
T117 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T63 |
16 |
|
T116 |
14 |
|
T117 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T63 |
33 |
|
T116 |
46 |
|
T117 |
49 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T63 |
15 |
|
T116 |
12 |
|
T117 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T63 |
35 |
|
T116 |
43 |
|
T117 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T63 |
16 |
|
T116 |
13 |
|
T117 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T63 |
30 |
|
T116 |
47 |
|
T117 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T63 |
15 |
|
T116 |
12 |
|
T117 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T63 |
35 |
|
T116 |
41 |
|
T117 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T63 |
16 |
|
T116 |
13 |
|
T117 |
21 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T63 |
30 |
|
T116 |
47 |
|
T117 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T63 |
15 |
|
T116 |
12 |
|
T117 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T63 |
34 |
|
T116 |
41 |
|
T117 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T63 |
16 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T63 |
30 |
|
T116 |
47 |
|
T117 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T63 |
15 |
|
T116 |
12 |
|
T117 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T63 |
34 |
|
T116 |
40 |
|
T117 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T63 |
16 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T63 |
30 |
|
T116 |
47 |
|
T117 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T63 |
15 |
|
T116 |
12 |
|
T117 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T63 |
34 |
|
T116 |
38 |
|
T117 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T63 |
16 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T63 |
30 |
|
T116 |
46 |
|
T117 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T63 |
15 |
|
T116 |
12 |
|
T117 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T63 |
33 |
|
T116 |
38 |
|
T117 |
41 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T63 |
16 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T63 |
30 |
|
T116 |
45 |
|
T117 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T63 |
15 |
|
T116 |
12 |
|
T117 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T63 |
31 |
|
T116 |
37 |
|
T117 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T63 |
16 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T63 |
29 |
|
T116 |
43 |
|
T117 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T63 |
15 |
|
T116 |
12 |
|
T117 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T63 |
30 |
|
T116 |
36 |
|
T117 |
39 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T63 |
16 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T63 |
29 |
|
T116 |
41 |
|
T117 |
43 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T63 |
15 |
|
T116 |
12 |
|
T117 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T63 |
29 |
|
T116 |
36 |
|
T117 |
37 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T63 |
16 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T63 |
29 |
|
T116 |
40 |
|
T117 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T63 |
15 |
|
T116 |
12 |
|
T117 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T63 |
26 |
|
T116 |
36 |
|
T117 |
37 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T63 |
16 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T63 |
29 |
|
T116 |
40 |
|
T117 |
41 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T63 |
15 |
|
T116 |
12 |
|
T117 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T63 |
26 |
|
T116 |
36 |
|
T117 |
36 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T63 |
16 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T63 |
28 |
|
T116 |
36 |
|
T117 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T63 |
15 |
|
T116 |
12 |
|
T117 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1197 |
1 |
|
|
T63 |
25 |
|
T116 |
36 |
|
T117 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T63 |
16 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1214 |
1 |
|
|
T63 |
27 |
|
T116 |
33 |
|
T117 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T63 |
15 |
|
T116 |
12 |
|
T117 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1169 |
1 |
|
|
T63 |
25 |
|
T116 |
36 |
|
T117 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T63 |
16 |
|
T116 |
13 |
|
T117 |
20 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T63 |
27 |
|
T116 |
32 |
|
T117 |
39 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59137 |
1 |
|
|
T63 |
703 |
|
T116 |
2128 |
|
T117 |
1657 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46656 |
1 |
|
|
T63 |
1510 |
|
T116 |
805 |
|
T117 |
1048 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51962 |
1 |
|
|
T63 |
866 |
|
T116 |
1470 |
|
T117 |
1048 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44706 |
1 |
|
|
T63 |
733 |
|
T116 |
593 |
|
T117 |
1856 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T63 |
12 |
|
T116 |
26 |
|
T117 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T63 |
42 |
|
T116 |
34 |
|
T117 |
40 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T63 |
13 |
|
T116 |
25 |
|
T117 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T63 |
40 |
|
T116 |
35 |
|
T117 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T63 |
12 |
|
T116 |
26 |
|
T117 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T63 |
40 |
|
T116 |
32 |
|
T117 |
40 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T63 |
13 |
|
T116 |
25 |
|
T117 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T63 |
38 |
|
T116 |
34 |
|
T117 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T63 |
12 |
|
T116 |
26 |
|
T117 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T63 |
40 |
|
T116 |
32 |
|
T117 |
40 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T63 |
13 |
|
T116 |
25 |
|
T117 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T63 |
36 |
|
T116 |
34 |
|
T117 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T63 |
12 |
|
T116 |
26 |
|
T117 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T63 |
40 |
|
T116 |
30 |
|
T117 |
40 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T63 |
13 |
|
T116 |
25 |
|
T117 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T63 |
36 |
|
T116 |
34 |
|
T117 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T63 |
12 |
|
T116 |
26 |
|
T117 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T63 |
39 |
|
T116 |
30 |
|
T117 |
38 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T63 |
13 |
|
T116 |
25 |
|
T117 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T63 |
34 |
|
T116 |
33 |
|
T117 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T63 |
12 |
|
T116 |
26 |
|
T117 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T63 |
38 |
|
T116 |
30 |
|
T117 |
37 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T63 |
13 |
|
T116 |
25 |
|
T117 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T63 |
34 |
|
T116 |
32 |
|
T117 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T63 |
11 |
|
T116 |
26 |
|
T117 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T63 |
37 |
|
T116 |
29 |
|
T117 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T63 |
13 |
|
T116 |
25 |
|
T117 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T63 |
32 |
|
T116 |
32 |
|
T117 |
42 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T63 |
11 |
|
T116 |
26 |
|
T117 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T63 |
37 |
|
T116 |
28 |
|
T117 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T63 |
13 |
|
T116 |
25 |
|
T117 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T63 |
31 |
|
T116 |
31 |
|
T117 |
40 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T63 |
11 |
|
T116 |
26 |
|
T117 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T63 |
36 |
|
T116 |
27 |
|
T117 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T63 |
13 |
|
T116 |
25 |
|
T117 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T63 |
31 |
|
T116 |
29 |
|
T117 |
40 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T63 |
11 |
|
T116 |
26 |
|
T117 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T63 |
36 |
|
T116 |
27 |
|
T117 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T63 |
13 |
|
T116 |
25 |
|
T117 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T63 |
30 |
|
T116 |
28 |
|
T117 |
38 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T63 |
11 |
|
T116 |
26 |
|
T117 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T63 |
36 |
|
T116 |
27 |
|
T117 |
33 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T63 |
13 |
|
T116 |
25 |
|
T117 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T63 |
30 |
|
T116 |
28 |
|
T117 |
37 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T63 |
11 |
|
T116 |
26 |
|
T117 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T63 |
36 |
|
T116 |
27 |
|
T117 |
33 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T63 |
13 |
|
T116 |
25 |
|
T117 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1225 |
1 |
|
|
T63 |
29 |
|
T116 |
26 |
|
T117 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T63 |
11 |
|
T116 |
26 |
|
T117 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T63 |
36 |
|
T116 |
26 |
|
T117 |
33 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T63 |
13 |
|
T116 |
25 |
|
T117 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1189 |
1 |
|
|
T63 |
29 |
|
T116 |
26 |
|
T117 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T63 |
11 |
|
T116 |
26 |
|
T117 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T63 |
36 |
|
T116 |
26 |
|
T117 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T63 |
13 |
|
T116 |
25 |
|
T117 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1157 |
1 |
|
|
T63 |
29 |
|
T116 |
24 |
|
T117 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T63 |
11 |
|
T116 |
26 |
|
T117 |
19 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T63 |
34 |
|
T116 |
26 |
|
T117 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T63 |
13 |
|
T116 |
25 |
|
T117 |
17 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1126 |
1 |
|
|
T63 |
27 |
|
T116 |
23 |
|
T117 |
33 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56019 |
1 |
|
|
T63 |
936 |
|
T116 |
2265 |
|
T117 |
868 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44289 |
1 |
|
|
T63 |
547 |
|
T116 |
951 |
|
T117 |
1196 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54936 |
1 |
|
|
T63 |
874 |
|
T116 |
986 |
|
T117 |
1083 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44906 |
1 |
|
|
T63 |
1573 |
|
T116 |
925 |
|
T117 |
2058 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T63 |
14 |
|
T116 |
21 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T63 |
33 |
|
T116 |
34 |
|
T117 |
59 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T63 |
11 |
|
T116 |
18 |
|
T117 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1696 |
1 |
|
|
T63 |
36 |
|
T116 |
37 |
|
T117 |
59 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T63 |
14 |
|
T116 |
21 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T63 |
32 |
|
T116 |
33 |
|
T117 |
57 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T63 |
11 |
|
T116 |
18 |
|
T117 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T63 |
36 |
|
T116 |
37 |
|
T117 |
59 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T63 |
14 |
|
T116 |
21 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T63 |
32 |
|
T116 |
33 |
|
T117 |
56 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T63 |
11 |
|
T116 |
17 |
|
T117 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T63 |
36 |
|
T116 |
38 |
|
T117 |
58 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T63 |
14 |
|
T116 |
21 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T63 |
31 |
|
T116 |
32 |
|
T117 |
56 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T63 |
11 |
|
T116 |
17 |
|
T117 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T63 |
36 |
|
T116 |
38 |
|
T117 |
57 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T63 |
14 |
|
T116 |
21 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T63 |
31 |
|
T116 |
32 |
|
T117 |
56 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T63 |
11 |
|
T116 |
17 |
|
T117 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T63 |
36 |
|
T116 |
38 |
|
T117 |
53 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T63 |
14 |
|
T116 |
21 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T63 |
29 |
|
T116 |
30 |
|
T117 |
56 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T63 |
11 |
|
T116 |
17 |
|
T117 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T63 |
36 |
|
T116 |
37 |
|
T117 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T63 |
14 |
|
T116 |
21 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T63 |
28 |
|
T116 |
30 |
|
T117 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T63 |
11 |
|
T116 |
17 |
|
T117 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T63 |
36 |
|
T116 |
36 |
|
T117 |
50 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T63 |
14 |
|
T116 |
21 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T63 |
28 |
|
T116 |
29 |
|
T117 |
53 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T63 |
11 |
|
T116 |
17 |
|
T117 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T63 |
35 |
|
T116 |
35 |
|
T117 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T63 |
14 |
|
T116 |
21 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T63 |
26 |
|
T116 |
27 |
|
T117 |
53 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T63 |
11 |
|
T116 |
17 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T63 |
35 |
|
T116 |
35 |
|
T117 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T63 |
14 |
|
T116 |
21 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T63 |
25 |
|
T116 |
27 |
|
T117 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T63 |
11 |
|
T116 |
17 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T63 |
34 |
|
T116 |
34 |
|
T117 |
44 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T63 |
14 |
|
T116 |
21 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T63 |
24 |
|
T116 |
26 |
|
T117 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T63 |
11 |
|
T116 |
17 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T63 |
34 |
|
T116 |
32 |
|
T117 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T63 |
14 |
|
T116 |
21 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T63 |
24 |
|
T116 |
26 |
|
T117 |
50 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T63 |
11 |
|
T116 |
17 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T63 |
33 |
|
T116 |
29 |
|
T117 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T63 |
14 |
|
T116 |
21 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T63 |
24 |
|
T116 |
26 |
|
T117 |
50 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T63 |
11 |
|
T116 |
17 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T63 |
29 |
|
T116 |
27 |
|
T117 |
40 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T63 |
14 |
|
T116 |
21 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T63 |
23 |
|
T116 |
25 |
|
T117 |
46 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T63 |
11 |
|
T116 |
17 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T63 |
29 |
|
T116 |
27 |
|
T117 |
39 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T63 |
14 |
|
T116 |
21 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T63 |
22 |
|
T116 |
25 |
|
T117 |
46 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T63 |
11 |
|
T116 |
17 |
|
T117 |
18 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1231 |
1 |
|
|
T63 |
29 |
|
T116 |
27 |
|
T117 |
38 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53452 |
1 |
|
|
T63 |
1576 |
|
T116 |
1032 |
|
T117 |
1275 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42758 |
1 |
|
|
T63 |
700 |
|
T116 |
867 |
|
T117 |
1312 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59983 |
1 |
|
|
T63 |
700 |
|
T116 |
1246 |
|
T117 |
1176 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45752 |
1 |
|
|
T63 |
803 |
|
T116 |
1860 |
|
T117 |
1810 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T63 |
17 |
|
T116 |
19 |
|
T117 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1590 |
1 |
|
|
T63 |
37 |
|
T116 |
40 |
|
T117 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T63 |
13 |
|
T116 |
22 |
|
T117 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T63 |
40 |
|
T116 |
38 |
|
T117 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T63 |
17 |
|
T116 |
19 |
|
T117 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T63 |
35 |
|
T116 |
39 |
|
T117 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T63 |
13 |
|
T116 |
22 |
|
T117 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T63 |
39 |
|
T116 |
37 |
|
T117 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T63 |
17 |
|
T116 |
19 |
|
T117 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T63 |
35 |
|
T116 |
37 |
|
T117 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T63 |
13 |
|
T116 |
21 |
|
T117 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T63 |
37 |
|
T116 |
38 |
|
T117 |
46 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T63 |
17 |
|
T116 |
19 |
|
T117 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T63 |
35 |
|
T116 |
37 |
|
T117 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T63 |
13 |
|
T116 |
21 |
|
T117 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T63 |
37 |
|
T116 |
38 |
|
T117 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T63 |
17 |
|
T116 |
19 |
|
T117 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T63 |
34 |
|
T116 |
36 |
|
T117 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T63 |
13 |
|
T116 |
21 |
|
T117 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T63 |
36 |
|
T116 |
37 |
|
T117 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T63 |
17 |
|
T116 |
19 |
|
T117 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T63 |
34 |
|
T116 |
36 |
|
T117 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T63 |
13 |
|
T116 |
21 |
|
T117 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T63 |
36 |
|
T116 |
36 |
|
T117 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T63 |
17 |
|
T116 |
19 |
|
T117 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T63 |
34 |
|
T116 |
36 |
|
T117 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T63 |
13 |
|
T116 |
21 |
|
T117 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T63 |
35 |
|
T116 |
34 |
|
T117 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T63 |
17 |
|
T116 |
19 |
|
T117 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T63 |
32 |
|
T116 |
35 |
|
T117 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T63 |
13 |
|
T116 |
21 |
|
T117 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T63 |
35 |
|
T116 |
33 |
|
T117 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T63 |
17 |
|
T116 |
19 |
|
T117 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T63 |
31 |
|
T116 |
35 |
|
T117 |
43 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T63 |
13 |
|
T116 |
21 |
|
T117 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T63 |
35 |
|
T116 |
33 |
|
T117 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T63 |
17 |
|
T116 |
19 |
|
T117 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T63 |
30 |
|
T116 |
35 |
|
T117 |
43 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T63 |
13 |
|
T116 |
21 |
|
T117 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T63 |
35 |
|
T116 |
32 |
|
T117 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T63 |
17 |
|
T116 |
19 |
|
T117 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T63 |
28 |
|
T116 |
35 |
|
T117 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T63 |
13 |
|
T116 |
21 |
|
T117 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T63 |
34 |
|
T116 |
31 |
|
T117 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T63 |
17 |
|
T116 |
19 |
|
T117 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1218 |
1 |
|
|
T63 |
27 |
|
T116 |
35 |
|
T117 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T63 |
13 |
|
T116 |
21 |
|
T117 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T63 |
33 |
|
T116 |
31 |
|
T117 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T63 |
17 |
|
T116 |
19 |
|
T117 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1183 |
1 |
|
|
T63 |
25 |
|
T116 |
33 |
|
T117 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T63 |
13 |
|
T116 |
21 |
|
T117 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T63 |
33 |
|
T116 |
29 |
|
T117 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T63 |
17 |
|
T116 |
19 |
|
T117 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1156 |
1 |
|
|
T63 |
25 |
|
T116 |
33 |
|
T117 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T63 |
13 |
|
T116 |
21 |
|
T117 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1223 |
1 |
|
|
T63 |
33 |
|
T116 |
28 |
|
T117 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T63 |
17 |
|
T116 |
19 |
|
T117 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1119 |
1 |
|
|
T63 |
25 |
|
T116 |
31 |
|
T117 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T63 |
13 |
|
T116 |
21 |
|
T117 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T63 |
33 |
|
T116 |
26 |
|
T117 |
31 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57676 |
1 |
|
|
T63 |
1637 |
|
T116 |
1505 |
|
T117 |
1942 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41853 |
1 |
|
|
T63 |
636 |
|
T116 |
681 |
|
T117 |
951 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57123 |
1 |
|
|
T63 |
743 |
|
T116 |
2570 |
|
T117 |
1181 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45569 |
1 |
|
|
T63 |
742 |
|
T116 |
581 |
|
T117 |
1115 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T63 |
43 |
|
T116 |
28 |
|
T117 |
54 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T63 |
12 |
|
T116 |
20 |
|
T117 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T63 |
42 |
|
T116 |
28 |
|
T117 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T63 |
41 |
|
T116 |
26 |
|
T117 |
53 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T63 |
12 |
|
T116 |
20 |
|
T117 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T63 |
41 |
|
T116 |
28 |
|
T117 |
47 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T63 |
41 |
|
T116 |
26 |
|
T117 |
53 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T63 |
12 |
|
T116 |
20 |
|
T117 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T63 |
41 |
|
T116 |
26 |
|
T117 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T63 |
40 |
|
T116 |
26 |
|
T117 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T63 |
12 |
|
T116 |
20 |
|
T117 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T63 |
40 |
|
T116 |
25 |
|
T117 |
44 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T63 |
40 |
|
T116 |
26 |
|
T117 |
48 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T63 |
12 |
|
T116 |
20 |
|
T117 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T63 |
40 |
|
T116 |
24 |
|
T117 |
43 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T63 |
39 |
|
T116 |
26 |
|
T117 |
47 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T63 |
12 |
|
T116 |
20 |
|
T117 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T63 |
39 |
|
T116 |
24 |
|
T117 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T63 |
37 |
|
T116 |
25 |
|
T117 |
45 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T63 |
39 |
|
T116 |
24 |
|
T117 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T63 |
35 |
|
T116 |
25 |
|
T117 |
44 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T63 |
37 |
|
T116 |
24 |
|
T117 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T63 |
35 |
|
T116 |
25 |
|
T117 |
43 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T63 |
37 |
|
T116 |
23 |
|
T117 |
40 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T63 |
34 |
|
T116 |
25 |
|
T117 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T63 |
37 |
|
T116 |
22 |
|
T117 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T63 |
34 |
|
T116 |
25 |
|
T117 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T63 |
37 |
|
T116 |
22 |
|
T117 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T63 |
31 |
|
T116 |
24 |
|
T117 |
41 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T63 |
37 |
|
T116 |
22 |
|
T117 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T63 |
30 |
|
T116 |
24 |
|
T117 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1222 |
1 |
|
|
T63 |
37 |
|
T116 |
21 |
|
T117 |
38 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1172 |
1 |
|
|
T63 |
28 |
|
T116 |
23 |
|
T117 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T63 |
36 |
|
T116 |
20 |
|
T117 |
37 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1142 |
1 |
|
|
T63 |
26 |
|
T116 |
21 |
|
T117 |
38 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T63 |
35 |
|
T116 |
20 |
|
T117 |
37 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52315 |
1 |
|
|
T63 |
614 |
|
T116 |
929 |
|
T117 |
1163 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44569 |
1 |
|
|
T63 |
1441 |
|
T116 |
969 |
|
T117 |
815 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59347 |
1 |
|
|
T63 |
884 |
|
T116 |
999 |
|
T117 |
2467 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44454 |
1 |
|
|
T63 |
842 |
|
T116 |
1817 |
|
T117 |
1069 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1644 |
1 |
|
|
T63 |
39 |
|
T116 |
54 |
|
T117 |
51 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T63 |
39 |
|
T116 |
52 |
|
T117 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T63 |
38 |
|
T116 |
52 |
|
T117 |
48 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T63 |
39 |
|
T116 |
52 |
|
T117 |
48 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T63 |
38 |
|
T116 |
52 |
|
T117 |
47 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T63 |
39 |
|
T116 |
52 |
|
T117 |
48 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T63 |
37 |
|
T116 |
52 |
|
T117 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
18 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T63 |
39 |
|
T116 |
52 |
|
T117 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T63 |
36 |
|
T116 |
52 |
|
T117 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T63 |
39 |
|
T116 |
51 |
|
T117 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T63 |
14 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T63 |
36 |
|
T116 |
51 |
|
T117 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T63 |
39 |
|
T116 |
50 |
|
T117 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T63 |
36 |
|
T116 |
50 |
|
T117 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T63 |
38 |
|
T116 |
49 |
|
T117 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T63 |
36 |
|
T116 |
48 |
|
T117 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T63 |
37 |
|
T116 |
48 |
|
T117 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T63 |
35 |
|
T116 |
47 |
|
T117 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T63 |
36 |
|
T116 |
47 |
|
T117 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T63 |
33 |
|
T116 |
47 |
|
T117 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T63 |
33 |
|
T116 |
46 |
|
T117 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T63 |
32 |
|
T116 |
47 |
|
T117 |
38 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1338 |
1 |
|
|
T63 |
31 |
|
T116 |
44 |
|
T117 |
38 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T63 |
32 |
|
T116 |
45 |
|
T117 |
36 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T63 |
30 |
|
T116 |
43 |
|
T117 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T63 |
32 |
|
T116 |
45 |
|
T117 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T63 |
30 |
|
T116 |
41 |
|
T117 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T63 |
32 |
|
T116 |
44 |
|
T117 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T63 |
29 |
|
T116 |
40 |
|
T117 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T63 |
31 |
|
T116 |
39 |
|
T117 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T63 |
13 |
|
T116 |
18 |
|
T117 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T63 |
29 |
|
T116 |
40 |
|
T117 |
36 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57496 |
1 |
|
|
T63 |
987 |
|
T116 |
1031 |
|
T117 |
1108 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44057 |
1 |
|
|
T63 |
614 |
|
T116 |
981 |
|
T117 |
1153 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55968 |
1 |
|
|
T63 |
1887 |
|
T116 |
1184 |
|
T117 |
1973 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43196 |
1 |
|
|
T63 |
479 |
|
T116 |
1657 |
|
T117 |
1094 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T63 |
19 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T63 |
27 |
|
T116 |
52 |
|
T117 |
56 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T63 |
18 |
|
T116 |
16 |
|
T117 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T63 |
28 |
|
T116 |
52 |
|
T117 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T63 |
19 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T63 |
26 |
|
T116 |
50 |
|
T117 |
56 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T63 |
18 |
|
T116 |
16 |
|
T117 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T63 |
27 |
|
T116 |
52 |
|
T117 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T63 |
19 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T63 |
25 |
|
T116 |
49 |
|
T117 |
55 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T63 |
27 |
|
T116 |
52 |
|
T117 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T63 |
19 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T63 |
25 |
|
T116 |
49 |
|
T117 |
55 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
20 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T63 |
26 |
|
T116 |
49 |
|
T117 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T63 |
19 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T63 |
25 |
|
T116 |
49 |
|
T117 |
55 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T63 |
26 |
|
T116 |
48 |
|
T117 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T63 |
19 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T63 |
25 |
|
T116 |
49 |
|
T117 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T63 |
25 |
|
T116 |
46 |
|
T117 |
50 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T63 |
25 |
|
T116 |
48 |
|
T117 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T63 |
25 |
|
T116 |
42 |
|
T117 |
50 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T63 |
25 |
|
T116 |
48 |
|
T117 |
50 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T63 |
23 |
|
T116 |
40 |
|
T117 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T63 |
25 |
|
T116 |
48 |
|
T117 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T63 |
22 |
|
T116 |
38 |
|
T117 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T63 |
25 |
|
T116 |
48 |
|
T117 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T63 |
22 |
|
T116 |
36 |
|
T117 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T63 |
24 |
|
T116 |
47 |
|
T117 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1321 |
1 |
|
|
T63 |
21 |
|
T116 |
35 |
|
T117 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T63 |
24 |
|
T116 |
47 |
|
T117 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T63 |
19 |
|
T116 |
34 |
|
T117 |
40 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T63 |
24 |
|
T116 |
46 |
|
T117 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T63 |
18 |
|
T116 |
33 |
|
T117 |
37 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T63 |
22 |
|
T116 |
44 |
|
T117 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T63 |
18 |
|
T116 |
32 |
|
T117 |
35 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T63 |
22 |
|
T116 |
43 |
|
T117 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T63 |
18 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T63 |
18 |
|
T116 |
30 |
|
T117 |
35 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54214 |
1 |
|
|
T63 |
1292 |
|
T116 |
1096 |
|
T117 |
818 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45642 |
1 |
|
|
T63 |
863 |
|
T116 |
1959 |
|
T117 |
1153 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57155 |
1 |
|
|
T63 |
695 |
|
T116 |
1298 |
|
T117 |
2584 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44679 |
1 |
|
|
T63 |
963 |
|
T116 |
840 |
|
T117 |
903 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T63 |
8 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T63 |
44 |
|
T116 |
32 |
|
T117 |
55 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T63 |
10 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1649 |
1 |
|
|
T63 |
41 |
|
T116 |
37 |
|
T117 |
51 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T63 |
8 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T63 |
44 |
|
T116 |
30 |
|
T117 |
52 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T63 |
10 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1624 |
1 |
|
|
T63 |
41 |
|
T116 |
37 |
|
T117 |
49 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T63 |
8 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T63 |
43 |
|
T116 |
30 |
|
T117 |
50 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T63 |
10 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T63 |
39 |
|
T116 |
37 |
|
T117 |
48 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T63 |
8 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T63 |
43 |
|
T116 |
30 |
|
T117 |
49 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T63 |
10 |
|
T116 |
15 |
|
T117 |
19 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T63 |
38 |
|
T116 |
37 |
|
T117 |
48 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T63 |
8 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T63 |
43 |
|
T116 |
30 |
|
T117 |
49 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T63 |
10 |
|
T116 |
15 |
|
T117 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T63 |
38 |
|
T116 |
36 |
|
T117 |
48 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
693 |
1 |
|
|
T63 |
8 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T63 |
42 |
|
T116 |
30 |
|
T117 |
49 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T63 |
10 |
|
T116 |
15 |
|
T117 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T63 |
38 |
|
T116 |
35 |
|
T117 |
45 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T63 |
7 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T63 |
42 |
|
T116 |
29 |
|
T117 |
47 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T63 |
10 |
|
T116 |
14 |
|
T117 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T63 |
38 |
|
T116 |
35 |
|
T117 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T63 |
7 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T63 |
41 |
|
T116 |
28 |
|
T117 |
47 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T63 |
10 |
|
T116 |
14 |
|
T117 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T63 |
38 |
|
T116 |
34 |
|
T117 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T63 |
7 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T63 |
41 |
|
T116 |
28 |
|
T117 |
47 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T63 |
10 |
|
T116 |
14 |
|
T117 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T63 |
37 |
|
T116 |
34 |
|
T117 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T63 |
7 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T63 |
41 |
|
T116 |
27 |
|
T117 |
46 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T63 |
10 |
|
T116 |
14 |
|
T117 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T63 |
34 |
|
T116 |
34 |
|
T117 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T63 |
7 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T63 |
41 |
|
T116 |
27 |
|
T117 |
45 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T63 |
10 |
|
T116 |
14 |
|
T117 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T63 |
33 |
|
T116 |
31 |
|
T117 |
38 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T63 |
7 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T63 |
41 |
|
T116 |
27 |
|
T117 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T63 |
10 |
|
T116 |
14 |
|
T117 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T63 |
33 |
|
T116 |
29 |
|
T117 |
36 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T63 |
7 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T63 |
40 |
|
T116 |
27 |
|
T117 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T63 |
10 |
|
T116 |
14 |
|
T117 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T63 |
31 |
|
T116 |
29 |
|
T117 |
34 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T63 |
7 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T63 |
35 |
|
T116 |
27 |
|
T117 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T63 |
10 |
|
T116 |
14 |
|
T117 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T63 |
30 |
|
T116 |
29 |
|
T117 |
33 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T63 |
7 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T63 |
35 |
|
T116 |
27 |
|
T117 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T63 |
10 |
|
T116 |
14 |
|
T117 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1166 |
1 |
|
|
T63 |
28 |
|
T116 |
29 |
|
T117 |
32 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57029 |
1 |
|
|
T63 |
1447 |
|
T116 |
873 |
|
T117 |
1249 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42648 |
1 |
|
|
T63 |
834 |
|
T116 |
747 |
|
T117 |
930 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58277 |
1 |
|
|
T63 |
582 |
|
T116 |
1829 |
|
T117 |
2316 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43626 |
1 |
|
|
T63 |
859 |
|
T116 |
1516 |
|
T117 |
1060 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T63 |
15 |
|
T116 |
25 |
|
T117 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T63 |
42 |
|
T116 |
33 |
|
T117 |
36 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T63 |
11 |
|
T116 |
25 |
|
T117 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T63 |
45 |
|
T116 |
34 |
|
T117 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T63 |
15 |
|
T116 |
25 |
|
T117 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T63 |
41 |
|
T116 |
33 |
|
T117 |
36 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T63 |
11 |
|
T116 |
25 |
|
T117 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T63 |
43 |
|
T116 |
34 |
|
T117 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T63 |
15 |
|
T116 |
25 |
|
T117 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T63 |
41 |
|
T116 |
33 |
|
T117 |
36 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T63 |
11 |
|
T116 |
25 |
|
T117 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1494 |
1 |
|
|
T63 |
43 |
|
T116 |
34 |
|
T117 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T63 |
15 |
|
T116 |
25 |
|
T117 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T63 |
41 |
|
T116 |
32 |
|
T117 |
34 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T63 |
11 |
|
T116 |
25 |
|
T117 |
21 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T63 |
43 |
|
T116 |
33 |
|
T117 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T63 |
15 |
|
T116 |
25 |
|
T117 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T63 |
40 |
|
T116 |
31 |
|
T117 |
34 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T63 |
11 |
|
T116 |
25 |
|
T117 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T63 |
41 |
|
T116 |
33 |
|
T117 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T63 |
15 |
|
T116 |
25 |
|
T117 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T63 |
40 |
|
T116 |
31 |
|
T117 |
34 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T63 |
11 |
|
T116 |
25 |
|
T117 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T63 |
40 |
|
T116 |
33 |
|
T117 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T63 |
14 |
|
T116 |
25 |
|
T117 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T63 |
38 |
|
T116 |
31 |
|
T117 |
34 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T63 |
11 |
|
T116 |
25 |
|
T117 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T63 |
39 |
|
T116 |
32 |
|
T117 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T63 |
14 |
|
T116 |
25 |
|
T117 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T63 |
37 |
|
T116 |
31 |
|
T117 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
741 |
1 |
|
|
T63 |
11 |
|
T116 |
25 |
|
T117 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T63 |
38 |
|
T116 |
32 |
|
T117 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T63 |
14 |
|
T116 |
25 |
|
T117 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T63 |
37 |
|
T116 |
31 |
|
T117 |
32 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T63 |
11 |
|
T116 |
25 |
|
T117 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T63 |
37 |
|
T116 |
32 |
|
T117 |
38 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T63 |
14 |
|
T116 |
25 |
|
T117 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T63 |
36 |
|
T116 |
30 |
|
T117 |
32 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T63 |
11 |
|
T116 |
25 |
|
T117 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T63 |
35 |
|
T116 |
32 |
|
T117 |
38 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T63 |
14 |
|
T116 |
25 |
|
T117 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T63 |
35 |
|
T116 |
28 |
|
T117 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T63 |
11 |
|
T116 |
25 |
|
T117 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T63 |
32 |
|
T116 |
31 |
|
T117 |
38 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T63 |
14 |
|
T116 |
25 |
|
T117 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T63 |
35 |
|
T116 |
28 |
|
T117 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T63 |
11 |
|
T116 |
25 |
|
T117 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T63 |
31 |
|
T116 |
30 |
|
T117 |
36 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T63 |
14 |
|
T116 |
25 |
|
T117 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1205 |
1 |
|
|
T63 |
34 |
|
T116 |
27 |
|
T117 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T63 |
11 |
|
T116 |
25 |
|
T117 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T63 |
31 |
|
T116 |
28 |
|
T117 |
34 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T63 |
14 |
|
T116 |
25 |
|
T117 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1171 |
1 |
|
|
T63 |
34 |
|
T116 |
27 |
|
T117 |
27 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T63 |
11 |
|
T116 |
25 |
|
T117 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1153 |
1 |
|
|
T63 |
31 |
|
T116 |
28 |
|
T117 |
32 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T63 |
14 |
|
T116 |
25 |
|
T117 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1147 |
1 |
|
|
T63 |
34 |
|
T116 |
26 |
|
T117 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T63 |
11 |
|
T116 |
25 |
|
T117 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1120 |
1 |
|
|
T63 |
30 |
|
T116 |
28 |
|
T117 |
32 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54732 |
1 |
|
|
T63 |
1327 |
|
T116 |
1913 |
|
T117 |
951 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43012 |
1 |
|
|
T63 |
907 |
|
T116 |
1044 |
|
T117 |
2076 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57819 |
1 |
|
|
T63 |
814 |
|
T116 |
840 |
|
T117 |
1045 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45413 |
1 |
|
|
T63 |
678 |
|
T116 |
1105 |
|
T117 |
1278 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T63 |
12 |
|
T116 |
13 |
|
T117 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T63 |
44 |
|
T116 |
52 |
|
T117 |
62 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T63 |
16 |
|
T116 |
17 |
|
T117 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T63 |
39 |
|
T116 |
48 |
|
T117 |
58 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T63 |
12 |
|
T116 |
13 |
|
T117 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T63 |
44 |
|
T116 |
50 |
|
T117 |
62 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T63 |
16 |
|
T116 |
17 |
|
T117 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T63 |
38 |
|
T116 |
48 |
|
T117 |
58 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T63 |
12 |
|
T116 |
13 |
|
T117 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T63 |
43 |
|
T116 |
49 |
|
T117 |
61 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T63 |
16 |
|
T116 |
16 |
|
T117 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T63 |
38 |
|
T116 |
49 |
|
T117 |
57 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T63 |
12 |
|
T116 |
13 |
|
T117 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T63 |
43 |
|
T116 |
44 |
|
T117 |
61 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T63 |
16 |
|
T116 |
16 |
|
T117 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T63 |
36 |
|
T116 |
48 |
|
T117 |
57 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T63 |
12 |
|
T116 |
13 |
|
T117 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T63 |
43 |
|
T116 |
43 |
|
T117 |
59 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T63 |
16 |
|
T116 |
16 |
|
T117 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T63 |
34 |
|
T116 |
46 |
|
T117 |
57 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T63 |
12 |
|
T116 |
13 |
|
T117 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T63 |
42 |
|
T116 |
43 |
|
T117 |
58 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T63 |
16 |
|
T116 |
16 |
|
T117 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T63 |
33 |
|
T116 |
46 |
|
T117 |
55 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T63 |
11 |
|
T116 |
13 |
|
T117 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T63 |
41 |
|
T116 |
42 |
|
T117 |
58 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T63 |
16 |
|
T116 |
16 |
|
T117 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T63 |
33 |
|
T116 |
44 |
|
T117 |
50 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T63 |
11 |
|
T116 |
13 |
|
T117 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T63 |
40 |
|
T116 |
42 |
|
T117 |
57 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T63 |
16 |
|
T116 |
16 |
|
T117 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T63 |
31 |
|
T116 |
44 |
|
T117 |
50 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T63 |
11 |
|
T116 |
13 |
|
T117 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T63 |
39 |
|
T116 |
41 |
|
T117 |
55 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T63 |
16 |
|
T116 |
16 |
|
T117 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T63 |
31 |
|
T116 |
44 |
|
T117 |
49 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T63 |
11 |
|
T116 |
13 |
|
T117 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T63 |
39 |
|
T116 |
41 |
|
T117 |
55 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T63 |
16 |
|
T116 |
16 |
|
T117 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T63 |
31 |
|
T116 |
43 |
|
T117 |
47 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T63 |
11 |
|
T116 |
13 |
|
T117 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T63 |
38 |
|
T116 |
40 |
|
T117 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T63 |
16 |
|
T116 |
16 |
|
T117 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T63 |
30 |
|
T116 |
43 |
|
T117 |
47 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T63 |
11 |
|
T116 |
13 |
|
T117 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T63 |
38 |
|
T116 |
39 |
|
T117 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T63 |
16 |
|
T116 |
16 |
|
T117 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T63 |
29 |
|
T116 |
43 |
|
T117 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T63 |
11 |
|
T116 |
13 |
|
T117 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T63 |
38 |
|
T116 |
37 |
|
T117 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T63 |
16 |
|
T116 |
16 |
|
T117 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T63 |
28 |
|
T116 |
42 |
|
T117 |
42 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T63 |
11 |
|
T116 |
13 |
|
T117 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T63 |
38 |
|
T116 |
36 |
|
T117 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T63 |
16 |
|
T116 |
16 |
|
T117 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T63 |
27 |
|
T116 |
40 |
|
T117 |
41 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T63 |
11 |
|
T116 |
13 |
|
T117 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T63 |
38 |
|
T116 |
35 |
|
T117 |
50 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T63 |
16 |
|
T116 |
16 |
|
T117 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1189 |
1 |
|
|
T63 |
24 |
|
T116 |
40 |
|
T117 |
39 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55799 |
1 |
|
|
T63 |
1040 |
|
T116 |
1015 |
|
T117 |
1321 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39965 |
1 |
|
|
T63 |
736 |
|
T116 |
934 |
|
T117 |
987 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62164 |
1 |
|
|
T63 |
856 |
|
T116 |
2272 |
|
T117 |
2079 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43656 |
1 |
|
|
T63 |
1302 |
|
T116 |
737 |
|
T117 |
860 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T63 |
18 |
|
T116 |
20 |
|
T117 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T63 |
29 |
|
T116 |
42 |
|
T117 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T63 |
35 |
|
T116 |
44 |
|
T117 |
49 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T63 |
18 |
|
T116 |
20 |
|
T117 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T63 |
28 |
|
T116 |
41 |
|
T117 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T63 |
34 |
|
T116 |
44 |
|
T117 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T63 |
18 |
|
T116 |
20 |
|
T117 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T63 |
27 |
|
T116 |
40 |
|
T117 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T63 |
34 |
|
T116 |
41 |
|
T117 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T63 |
18 |
|
T116 |
20 |
|
T117 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T63 |
27 |
|
T116 |
39 |
|
T117 |
49 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T63 |
34 |
|
T116 |
39 |
|
T117 |
45 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T63 |
18 |
|
T116 |
20 |
|
T117 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T63 |
27 |
|
T116 |
38 |
|
T117 |
48 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T63 |
34 |
|
T116 |
39 |
|
T117 |
45 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T63 |
18 |
|
T116 |
20 |
|
T117 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T63 |
27 |
|
T116 |
38 |
|
T117 |
47 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T63 |
33 |
|
T116 |
38 |
|
T117 |
45 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T63 |
18 |
|
T116 |
20 |
|
T117 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T63 |
27 |
|
T116 |
38 |
|
T117 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T63 |
33 |
|
T116 |
37 |
|
T117 |
45 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T63 |
18 |
|
T116 |
20 |
|
T117 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T63 |
27 |
|
T116 |
38 |
|
T117 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T63 |
30 |
|
T116 |
36 |
|
T117 |
44 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T63 |
18 |
|
T116 |
20 |
|
T117 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T63 |
26 |
|
T116 |
37 |
|
T117 |
45 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T63 |
30 |
|
T116 |
35 |
|
T117 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T63 |
18 |
|
T116 |
20 |
|
T117 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T63 |
25 |
|
T116 |
36 |
|
T117 |
44 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T63 |
29 |
|
T116 |
33 |
|
T117 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T63 |
18 |
|
T116 |
20 |
|
T117 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T63 |
25 |
|
T116 |
36 |
|
T117 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T63 |
27 |
|
T116 |
32 |
|
T117 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T63 |
18 |
|
T116 |
20 |
|
T117 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T63 |
24 |
|
T116 |
36 |
|
T117 |
40 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T63 |
27 |
|
T116 |
32 |
|
T117 |
42 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T63 |
18 |
|
T116 |
20 |
|
T117 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T63 |
24 |
|
T116 |
35 |
|
T117 |
37 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T63 |
26 |
|
T116 |
31 |
|
T117 |
39 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T63 |
18 |
|
T116 |
20 |
|
T117 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T63 |
24 |
|
T116 |
33 |
|
T117 |
37 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T63 |
24 |
|
T116 |
29 |
|
T117 |
39 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T63 |
18 |
|
T116 |
20 |
|
T117 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1184 |
1 |
|
|
T63 |
24 |
|
T116 |
33 |
|
T117 |
36 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T63 |
12 |
|
T116 |
19 |
|
T117 |
24 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1167 |
1 |
|
|
T63 |
22 |
|
T116 |
28 |
|
T117 |
37 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55952 |
1 |
|
|
T63 |
1014 |
|
T116 |
1094 |
|
T117 |
1116 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45577 |
1 |
|
|
T63 |
242 |
|
T116 |
860 |
|
T117 |
1942 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50866 |
1 |
|
|
T63 |
2553 |
|
T116 |
1241 |
|
T117 |
1100 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48750 |
1 |
|
|
T63 |
445 |
|
T116 |
1805 |
|
T117 |
1303 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T63 |
20 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T63 |
15 |
|
T116 |
40 |
|
T117 |
54 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T63 |
19 |
|
T116 |
20 |
|
T117 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T63 |
16 |
|
T116 |
41 |
|
T117 |
48 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T63 |
20 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T63 |
15 |
|
T116 |
39 |
|
T117 |
51 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T63 |
19 |
|
T116 |
20 |
|
T117 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T63 |
16 |
|
T116 |
41 |
|
T117 |
48 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T63 |
20 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T63 |
13 |
|
T116 |
38 |
|
T117 |
49 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T63 |
19 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T63 |
16 |
|
T116 |
40 |
|
T117 |
46 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T63 |
20 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T63 |
12 |
|
T116 |
38 |
|
T117 |
47 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T63 |
19 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T63 |
16 |
|
T116 |
40 |
|
T117 |
46 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T63 |
20 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T63 |
12 |
|
T116 |
37 |
|
T117 |
46 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T63 |
19 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T63 |
16 |
|
T116 |
40 |
|
T117 |
45 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T63 |
20 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T63 |
11 |
|
T116 |
36 |
|
T117 |
45 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T63 |
19 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T63 |
16 |
|
T116 |
38 |
|
T117 |
45 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T63 |
20 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T63 |
9 |
|
T116 |
35 |
|
T117 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T63 |
19 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T63 |
16 |
|
T116 |
37 |
|
T117 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T63 |
20 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T63 |
9 |
|
T116 |
35 |
|
T117 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T63 |
19 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T63 |
15 |
|
T116 |
36 |
|
T117 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T63 |
20 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T63 |
9 |
|
T116 |
33 |
|
T117 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T63 |
19 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T63 |
15 |
|
T116 |
35 |
|
T117 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T63 |
20 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T63 |
9 |
|
T116 |
32 |
|
T117 |
41 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T63 |
19 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T63 |
15 |
|
T116 |
35 |
|
T117 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T63 |
20 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T63 |
9 |
|
T116 |
32 |
|
T117 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T63 |
19 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T63 |
15 |
|
T116 |
35 |
|
T117 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T63 |
20 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T63 |
9 |
|
T116 |
31 |
|
T117 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T63 |
19 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T63 |
15 |
|
T116 |
32 |
|
T117 |
41 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T63 |
20 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T63 |
9 |
|
T116 |
30 |
|
T117 |
38 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T63 |
19 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T63 |
15 |
|
T116 |
30 |
|
T117 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T63 |
20 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1205 |
1 |
|
|
T63 |
8 |
|
T116 |
30 |
|
T117 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T63 |
19 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T63 |
15 |
|
T116 |
30 |
|
T117 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T63 |
20 |
|
T116 |
20 |
|
T117 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1175 |
1 |
|
|
T63 |
7 |
|
T116 |
30 |
|
T117 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T63 |
19 |
|
T116 |
19 |
|
T117 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T63 |
15 |
|
T116 |
28 |
|
T117 |
38 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
48860 |
1 |
|
|
T63 |
828 |
|
T116 |
1280 |
|
T117 |
745 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48038 |
1 |
|
|
T63 |
1452 |
|
T116 |
1738 |
|
T117 |
1330 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55941 |
1 |
|
|
T63 |
691 |
|
T116 |
1013 |
|
T117 |
1175 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48279 |
1 |
|
|
T63 |
926 |
|
T116 |
734 |
|
T117 |
2121 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T63 |
14 |
|
T116 |
26 |
|
T117 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T63 |
35 |
|
T116 |
42 |
|
T117 |
56 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T63 |
12 |
|
T116 |
24 |
|
T117 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T63 |
36 |
|
T116 |
44 |
|
T117 |
50 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T63 |
14 |
|
T116 |
26 |
|
T117 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T63 |
35 |
|
T116 |
42 |
|
T117 |
56 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T63 |
12 |
|
T116 |
24 |
|
T117 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T63 |
34 |
|
T116 |
43 |
|
T117 |
50 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T63 |
14 |
|
T116 |
26 |
|
T117 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T63 |
35 |
|
T116 |
41 |
|
T117 |
54 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T63 |
12 |
|
T116 |
24 |
|
T117 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T63 |
34 |
|
T116 |
41 |
|
T117 |
49 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T63 |
14 |
|
T116 |
26 |
|
T117 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T63 |
34 |
|
T116 |
39 |
|
T117 |
53 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T63 |
12 |
|
T116 |
24 |
|
T117 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T63 |
34 |
|
T116 |
41 |
|
T117 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T63 |
14 |
|
T116 |
26 |
|
T117 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T63 |
32 |
|
T116 |
39 |
|
T117 |
51 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T63 |
12 |
|
T116 |
24 |
|
T117 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T63 |
34 |
|
T116 |
41 |
|
T117 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T63 |
14 |
|
T116 |
26 |
|
T117 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T63 |
32 |
|
T116 |
37 |
|
T117 |
50 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T63 |
12 |
|
T116 |
24 |
|
T117 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T63 |
32 |
|
T116 |
40 |
|
T117 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T63 |
13 |
|
T116 |
26 |
|
T117 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T63 |
32 |
|
T116 |
37 |
|
T117 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T63 |
12 |
|
T116 |
23 |
|
T117 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T63 |
32 |
|
T116 |
39 |
|
T117 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T63 |
13 |
|
T116 |
26 |
|
T117 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T63 |
30 |
|
T116 |
37 |
|
T117 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T63 |
12 |
|
T116 |
23 |
|
T117 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T63 |
32 |
|
T116 |
38 |
|
T117 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T63 |
13 |
|
T116 |
26 |
|
T117 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T63 |
30 |
|
T116 |
37 |
|
T117 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T63 |
12 |
|
T116 |
23 |
|
T117 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T63 |
32 |
|
T116 |
38 |
|
T117 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T63 |
13 |
|
T116 |
26 |
|
T117 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T63 |
30 |
|
T116 |
35 |
|
T117 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T63 |
12 |
|
T116 |
23 |
|
T117 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T63 |
32 |
|
T116 |
38 |
|
T117 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T63 |
13 |
|
T116 |
26 |
|
T117 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T63 |
29 |
|
T116 |
35 |
|
T117 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T63 |
12 |
|
T116 |
23 |
|
T117 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T63 |
32 |
|
T116 |
38 |
|
T117 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T63 |
13 |
|
T116 |
26 |
|
T117 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T63 |
28 |
|
T116 |
34 |
|
T117 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T63 |
12 |
|
T116 |
23 |
|
T117 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T63 |
31 |
|
T116 |
38 |
|
T117 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T63 |
13 |
|
T116 |
26 |
|
T117 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T63 |
28 |
|
T116 |
34 |
|
T117 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T63 |
12 |
|
T116 |
23 |
|
T117 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T63 |
30 |
|
T116 |
36 |
|
T117 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T63 |
13 |
|
T116 |
26 |
|
T117 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T63 |
28 |
|
T116 |
33 |
|
T117 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T63 |
12 |
|
T116 |
23 |
|
T117 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T63 |
29 |
|
T116 |
34 |
|
T117 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T63 |
13 |
|
T116 |
26 |
|
T117 |
14 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T63 |
28 |
|
T116 |
32 |
|
T117 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T63 |
12 |
|
T116 |
23 |
|
T117 |
20 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1183 |
1 |
|
|
T63 |
29 |
|
T116 |
32 |
|
T117 |
38 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57175 |
1 |
|
|
T63 |
820 |
|
T116 |
1177 |
|
T117 |
1802 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44252 |
1 |
|
|
T63 |
1676 |
|
T116 |
952 |
|
T117 |
1427 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59372 |
1 |
|
|
T63 |
612 |
|
T116 |
1951 |
|
T117 |
868 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40789 |
1 |
|
|
T63 |
738 |
|
T116 |
951 |
|
T117 |
1073 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T63 |
40 |
|
T116 |
44 |
|
T117 |
64 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T63 |
9 |
|
T116 |
16 |
|
T117 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T63 |
43 |
|
T116 |
44 |
|
T117 |
57 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T63 |
40 |
|
T116 |
44 |
|
T117 |
62 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T63 |
9 |
|
T116 |
16 |
|
T117 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T63 |
42 |
|
T116 |
43 |
|
T117 |
56 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T63 |
40 |
|
T116 |
42 |
|
T117 |
61 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T63 |
9 |
|
T116 |
15 |
|
T117 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T63 |
41 |
|
T116 |
43 |
|
T117 |
56 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T63 |
40 |
|
T116 |
41 |
|
T117 |
61 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T63 |
9 |
|
T116 |
15 |
|
T117 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T63 |
39 |
|
T116 |
39 |
|
T117 |
54 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T63 |
40 |
|
T116 |
41 |
|
T117 |
60 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T63 |
9 |
|
T116 |
15 |
|
T117 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T63 |
38 |
|
T116 |
39 |
|
T117 |
55 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T63 |
13 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T63 |
39 |
|
T116 |
41 |
|
T117 |
59 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T63 |
9 |
|
T116 |
15 |
|
T117 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T63 |
37 |
|
T116 |
39 |
|
T117 |
53 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T63 |
12 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T63 |
38 |
|
T116 |
41 |
|
T117 |
58 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T63 |
9 |
|
T116 |
15 |
|
T117 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T63 |
36 |
|
T116 |
39 |
|
T117 |
53 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T63 |
12 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T63 |
37 |
|
T116 |
41 |
|
T117 |
57 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T63 |
9 |
|
T116 |
15 |
|
T117 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T63 |
34 |
|
T116 |
38 |
|
T117 |
50 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T63 |
12 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T63 |
36 |
|
T116 |
40 |
|
T117 |
56 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T63 |
9 |
|
T116 |
15 |
|
T117 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T63 |
32 |
|
T116 |
37 |
|
T117 |
48 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T63 |
12 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T63 |
34 |
|
T116 |
39 |
|
T117 |
56 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T63 |
9 |
|
T116 |
15 |
|
T117 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T63 |
31 |
|
T116 |
37 |
|
T117 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T63 |
12 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T63 |
33 |
|
T116 |
37 |
|
T117 |
56 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T63 |
9 |
|
T116 |
15 |
|
T117 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T63 |
30 |
|
T116 |
36 |
|
T117 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T63 |
12 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T63 |
32 |
|
T116 |
36 |
|
T117 |
55 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T63 |
9 |
|
T116 |
15 |
|
T117 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T63 |
29 |
|
T116 |
35 |
|
T117 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T63 |
12 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T63 |
32 |
|
T116 |
35 |
|
T117 |
54 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T63 |
9 |
|
T116 |
15 |
|
T117 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T63 |
29 |
|
T116 |
35 |
|
T117 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T63 |
12 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T63 |
32 |
|
T116 |
34 |
|
T117 |
53 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T63 |
9 |
|
T116 |
15 |
|
T117 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1223 |
1 |
|
|
T63 |
27 |
|
T116 |
33 |
|
T117 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T63 |
12 |
|
T116 |
15 |
|
T117 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T63 |
32 |
|
T116 |
33 |
|
T117 |
51 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T63 |
9 |
|
T116 |
15 |
|
T117 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T63 |
27 |
|
T116 |
32 |
|
T117 |
37 |