Unified Coverage Report :: Group :: cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	38	0	38	100.00
Crosses	192	0	192	100.00

Variables for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2
cp_intr_test	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_test_cg_cc	192	0	192	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	14207743	1			T1	1932		T2	938		T11	135
all_values[1]	14207743	1			T1	1932		T2	938		T11	135
all_values[2]	14207743	1			T1	1932		T2	938		T11	135
all_values[3]	14207743	1			T1	1932		T2	938		T11	135
all_values[4]	14207743	1			T1	1932		T2	938		T11	135
all_values[5]	14207743	1			T1	1932		T2	938		T11	135
all_values[6]	14207743	1			T1	1932		T2	938		T11	135
all_values[7]	14207743	1			T1	1932		T2	938		T11	135
all_values[8]	14207743	1			T1	1932		T2	938		T11	135
all_values[9]	14207743	1			T1	1932		T2	938		T11	135
all_values[10]	14207743	1			T1	1932		T2	938		T11	135
all_values[11]	14207743	1			T1	1932		T2	938		T11	135
all_values[12]	14207743	1			T1	1932		T2	938		T11	135
all_values[13]	14207743	1			T1	1932		T2	938		T11	135
all_values[14]	14207743	1			T1	1932		T2	938		T11	135
all_values[15]	14207743	1			T1	1932		T2	938		T11	135
all_values[16]	14207743	1			T1	1932		T2	938		T11	135
all_values[17]	14207743	1			T1	1932		T2	938		T11	135
all_values[18]	14207743	1			T1	1932		T2	938		T11	135
all_values[19]	14207743	1			T1	1932		T2	938		T11	135
all_values[20]	14207743	1			T1	1932		T2	938		T11	135
all_values[21]	14207743	1			T1	1932		T2	938		T11	135
all_values[22]	14207743	1			T1	1932		T2	938		T11	135
all_values[23]	14207743	1			T1	1932		T2	938		T11	135
all_values[24]	14207743	1			T1	1932		T2	938		T11	135
all_values[25]	14207743	1			T1	1932		T2	938		T11	135
all_values[26]	14207743	1			T1	1932		T2	938		T11	135
all_values[27]	14207743	1			T1	1932		T2	938		T11	135
all_values[28]	14207743	1			T1	1932		T2	938		T11	135
all_values[29]	14207743	1			T1	1932		T2	938		T11	135
all_values[30]	14207743	1			T1	1932		T2	938		T11	135
all_values[31]	14207743	1			T1	1932		T2	938		T11	135

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

262925217

1

T1

30938

T2

15884

T11

4320

auto[1]

191722559

1

T1

30886

T2

14132

T13

16879

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

107948091

1

T1

6761

T2

3963

T11

4320

auto[1]

346699685

1

T1

55063

T2

26053

T13

33379

---

Summary for Variable cp_intr_test

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_test

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

449610556

1

T1

59079

T2

28742

T11

4320

auto[1]

5037220

1

T1

2745

T2

1274

T14

1142

---

Summary for Cross intr_test_cg_cc

Samples crossed: cp_intr cp_intr_test cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
TOTAL	192	0	192	100.00
Automatically Generated Cross Bins	192	0	192	100.00
User Defined Cross Bins	0	0	0

Automatically Generated Cross Bins for intr_test_cg_cc

Bins

cp_intr	cp_intr_test	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	auto[0]	2787338	1			T1	82		T2	45		T11	135
all_values[0]	auto[0]	auto[0]	auto[1]	5336939	1			T1	638		T2	361		T13	543
all_values[0]	auto[0]	auto[1]	auto[0]	586581	1			T1	60		T2	96		T13	40
all_values[0]	auto[0]	auto[1]	auto[1]	5339519	1			T1	1062		T2	400		T13	497
all_values[0]	auto[1]	auto[0]	auto[1]	79437	1			T1	24		T2	20		T14	17
all_values[0]	auto[1]	auto[1]	auto[1]	77929	1			T1	66		T2	16		T14	13
all_values[1]	auto[0]	auto[0]	auto[0]	2791033	1			T1	124		T2	61		T11	135
all_values[1]	auto[0]	auto[0]	auto[1]	5346412	1			T1	706		T2	385		T13	510
all_values[1]	auto[0]	auto[1]	auto[0]	576753	1			T1	61		T2	46		T13	51
all_values[1]	auto[0]	auto[1]	auto[1]	5336564	1			T1	945		T2	409		T13	547
all_values[1]	auto[1]	auto[0]	auto[1]	78939	1			T1	46		T2	15		T14	12
all_values[1]	auto[1]	auto[1]	auto[1]	78042	1			T1	50		T2	22		T14	23
all_values[2]	auto[0]	auto[0]	auto[0]	2789822	1			T1	159		T2	92		T11	135
all_values[2]	auto[0]	auto[0]	auto[1]	5348899	1			T1	797		T2	447		T13	650
all_values[2]	auto[0]	auto[1]	auto[0]	584521	1			T1	130		T2	36		T13	15
all_values[2]	auto[0]	auto[1]	auto[1]	5327045	1			T1	776		T2	320		T13	436
all_values[2]	auto[1]	auto[0]	auto[1]	78636	1			T1	33		T2	23		T14	17
all_values[2]	auto[1]	auto[1]	auto[1]	78820	1			T1	37		T2	20		T14	20
all_values[3]	auto[0]	auto[0]	auto[0]	2789104	1			T1	127		T2	57		T11	135
all_values[3]	auto[0]	auto[0]	auto[1]	5364777	1			T1	860		T2	373		T13	769
all_values[3]	auto[0]	auto[1]	auto[0]	581925	1			T1	33		T2	62		T13	5
all_values[3]	auto[0]	auto[1]	auto[1]	5314528	1			T1	828		T2	404		T13	237
all_values[3]	auto[1]	auto[0]	auto[1]	79182	1			T1	45		T2	16		T14	20
all_values[3]	auto[1]	auto[1]	auto[1]	78227	1			T1	39		T2	26		T14	14
all_values[4]	auto[0]	auto[0]	auto[0]	2791176	1			T1	108		T2	80		T11	135
all_values[4]	auto[0]	auto[0]	auto[1]	5303929	1			T1	808		T2	404		T13	526
all_values[4]	auto[0]	auto[1]	auto[0]	580482	1			T1	60		T2	57		T13	24
all_values[4]	auto[0]	auto[1]	auto[1]	5375231	1			T1	862		T2	357		T13	559
all_values[4]	auto[1]	auto[0]	auto[1]	78529	1			T1	44		T2	20		T14	11
all_values[4]	auto[1]	auto[1]	auto[1]	78396	1			T1	50		T2	20		T14	25
all_values[5]	auto[0]	auto[0]	auto[0]	2789340	1			T1	73		T2	98		T11	135
all_values[5]	auto[0]	auto[0]	auto[1]	5363719	1			T1	724		T2	537		T13	655
all_values[5]	auto[0]	auto[1]	auto[0]	583106	1			T1	155		T2	26		T13	30
all_values[5]	auto[0]	auto[1]	auto[1]	5313771	1			T1	913		T2	238		T13	388
all_values[5]	auto[1]	auto[0]	auto[1]	79412	1			T1	35		T2	26		T14	21
all_values[5]	auto[1]	auto[1]	auto[1]	78395	1			T1	32		T2	13		T14	7
all_values[6]	auto[0]	auto[0]	auto[0]	2793070	1			T1	97		T2	85		T11	135
all_values[6]	auto[0]	auto[0]	auto[1]	5339021	1			T1	956		T2	495		T13	638
all_values[6]	auto[0]	auto[1]	auto[0]	578722	1			T1	124		T2	55		T13	18
all_values[6]	auto[0]	auto[1]	auto[1]	5339561	1			T1	670		T2	256		T13	402
all_values[6]	auto[1]	auto[0]	auto[1]	78948	1			T1	53		T2	36		T14	28
all_values[6]	auto[1]	auto[1]	auto[1]	78421	1			T1	32		T2	11		T14	13
all_values[7]	auto[0]	auto[0]	auto[0]	2784263	1			T1	141		T2	58		T11	135
all_values[7]	auto[0]	auto[0]	auto[1]	5355686	1			T1	799		T2	436		T13	408
all_values[7]	auto[0]	auto[1]	auto[0]	577296	1			T1	84		T2	67		T13	62
all_values[7]	auto[0]	auto[1]	auto[1]	5333460	1			T1	838		T2	341		T13	614
all_values[7]	auto[1]	auto[0]	auto[1]	78631	1			T1	34		T2	20		T14	27
all_values[7]	auto[1]	auto[1]	auto[1]	78407	1			T1	36		T2	16		T14	12
all_values[8]	auto[0]	auto[0]	auto[0]	2793381	1			T1	94		T2	67		T11	135
all_values[8]	auto[0]	auto[0]	auto[1]	5355406	1			T1	777		T2	478		T13	396
all_values[8]	auto[0]	auto[1]	auto[0]	587618	1			T1	148		T2	40		T13	27
all_values[8]	auto[0]	auto[1]	auto[1]	5313811	1			T1	843		T2	310		T13	674
all_values[8]	auto[1]	auto[0]	auto[1]	79245	1			T1	37		T2	27		T14	21
all_values[8]	auto[1]	auto[1]	auto[1]	78282	1			T1	33		T2	16		T14	19
all_values[9]	auto[0]	auto[0]	auto[0]	2792435	1			T1	101		T2	38		T11	135
all_values[9]	auto[0]	auto[0]	auto[1]	5359175	1			T1	862		T2	358		T13	621
all_values[9]	auto[0]	auto[1]	auto[0]	573122	1			T1	97		T2	70		T13	30
all_values[9]	auto[0]	auto[1]	auto[1]	5325156	1			T1	786		T2	435		T13	453
all_values[9]	auto[1]	auto[0]	auto[1]	79246	1			T1	41		T2	17		T14	10
all_values[9]	auto[1]	auto[1]	auto[1]	78609	1			T1	45		T2	20		T14	16
all_values[10]	auto[0]	auto[0]	auto[0]	2779409	1			T1	105		T2	64		T11	135
all_values[10]	auto[0]	auto[0]	auto[1]	5364087	1			T1	907		T2	301		T13	459
all_values[10]	auto[0]	auto[1]	auto[0]	580056	1			T1	112		T2	60		T13	106
all_values[10]	auto[0]	auto[1]	auto[1]	5327120	1			T1	721		T2	471		T13	518
all_values[10]	auto[1]	auto[0]	auto[1]	78751	1			T1	48		T2	14		T14	11
all_values[10]	auto[1]	auto[1]	auto[1]	78320	1			T1	39		T2	28		T14	16
all_values[11]	auto[0]	auto[0]	auto[0]	2792845	1			T1	54		T2	84		T11	135
all_values[11]	auto[0]	auto[0]	auto[1]	5340290	1			T1	755		T2	375		T13	481
all_values[11]	auto[0]	auto[1]	auto[0]	579786	1			T1	137		T2	37		T13	55
all_values[11]	auto[0]	auto[1]	auto[1]	5337685	1			T1	887		T2	409		T13	508
all_values[11]	auto[1]	auto[0]	auto[1]	78982	1			T1	46		T2	21		T14	25
all_values[11]	auto[1]	auto[1]	auto[1]	78155	1			T1	53		T2	12		T14	22
all_values[12]	auto[0]	auto[0]	auto[0]	2783919	1			T1	178		T2	75		T11	135
all_values[12]	auto[0]	auto[0]	auto[1]	5320766	1			T1	912		T2	398		T13	560
all_values[12]	auto[0]	auto[1]	auto[0]	581853	1			T1	81		T2	37		T13	21
all_values[12]	auto[0]	auto[1]	auto[1]	5364110	1			T1	681		T2	389		T13	462
all_values[12]	auto[1]	auto[0]	auto[1]	78665	1			T1	48		T2	24		T14	14
all_values[12]	auto[1]	auto[1]	auto[1]	78430	1			T1	32		T2	15		T14	17
all_values[13]	auto[0]	auto[0]	auto[0]	2791990	1			T1	64		T2	100		T11	135
all_values[13]	auto[0]	auto[0]	auto[1]	5367492	1			T1	669		T2	354		T13	536
all_values[13]	auto[0]	auto[1]	auto[0]	580670	1			T1	149		T2	46		T13	37
all_values[13]	auto[0]	auto[1]	auto[1]	5310017	1			T1	966		T2	402		T13	514
all_values[13]	auto[1]	auto[0]	auto[1]	78929	1			T1	32		T2	22		T14	21
all_values[13]	auto[1]	auto[1]	auto[1]	78645	1			T1	52		T2	14		T14	11
all_values[14]	auto[0]	auto[0]	auto[0]	2788225	1			T1	132		T2	98		T11	135
all_values[14]	auto[0]	auto[0]	auto[1]	5312751	1			T1	739		T2	374		T13	571
all_values[14]	auto[0]	auto[1]	auto[0]	584554	1			T1	54		T2	81		T13	37
all_values[14]	auto[0]	auto[1]	auto[1]	5364606	1			T1	916		T2	344		T13	473
all_values[14]	auto[1]	auto[0]	auto[1]	78823	1			T1	36		T2	18		T14	19
all_values[14]	auto[1]	auto[1]	auto[1]	78784	1			T1	55		T2	23		T14	26
all_values[15]	auto[0]	auto[0]	auto[0]	2791983	1			T1	78		T2	54		T11	135
all_values[15]	auto[0]	auto[0]	auto[1]	5334325	1			T1	836		T2	421		T13	562
all_values[15]	auto[0]	auto[1]	auto[0]	581678	1			T1	82		T2	69		T13	70
all_values[15]	auto[0]	auto[1]	auto[1]	5342653	1			T1	856		T2	353		T13	435
all_values[15]	auto[1]	auto[0]	auto[1]	78943	1			T1	44		T2	26		T14	14
all_values[15]	auto[1]	auto[1]	auto[1]	78161	1			T1	36		T2	15		T14	16
all_values[16]	auto[0]	auto[0]	auto[0]	2792148	1			T1	91		T2	67		T11	135
all_values[16]	auto[0]	auto[0]	auto[1]	5317114	1			T1	830		T2	323		T13	654
all_values[16]	auto[0]	auto[1]	auto[0]	587499	1			T1	213		T2	50		T13	15
all_values[16]	auto[0]	auto[1]	auto[1]	5353241	1			T1	715		T2	450		T13	391
all_values[16]	auto[1]	auto[0]	auto[1]	79130	1			T1	52		T2	25		T14	21
all_values[16]	auto[1]	auto[1]	auto[1]	78611	1			T1	31		T2	23		T14	12
all_values[17]	auto[0]	auto[0]	auto[0]	2796468	1			T1	79		T2	108		T11	135
all_values[17]	auto[0]	auto[0]	auto[1]	5338562	1			T1	800		T2	491		T13	698
all_values[17]	auto[0]	auto[1]	auto[0]	587461	1			T1	83		T2	29		T13	48
all_values[17]	auto[0]	auto[1]	auto[1]	5327613	1			T1	885		T2	273		T13	356
all_values[17]	auto[1]	auto[0]	auto[1]	78985	1			T1	46		T2	27		T14	14
all_values[17]	auto[1]	auto[1]	auto[1]	78654	1			T1	39		T2	10		T14	20
all_values[18]	auto[0]	auto[0]	auto[0]	2795800	1			T1	145		T2	57		T11	135
all_values[18]	auto[0]	auto[0]	auto[1]	5332858	1			T1	845		T2	406		T13	646
all_values[18]	auto[0]	auto[1]	auto[0]	585190	1			T1	52		T2	36		T13	30
all_values[18]	auto[0]	auto[1]	auto[1]	5336352	1			T1	813		T2	396		T13	405
all_values[18]	auto[1]	auto[0]	auto[1]	79099	1			T1	36		T2	22		T14	11
all_values[18]	auto[1]	auto[1]	auto[1]	78444	1			T1	41		T2	21		T14	23
all_values[19]	auto[0]	auto[0]	auto[0]	2788176	1			T1	117		T2	51		T11	135
all_values[19]	auto[0]	auto[0]	auto[1]	5338132	1			T1	957		T2	365		T13	547
all_values[19]	auto[0]	auto[1]	auto[0]	587042	1			T1	77		T2	49		T13	35
all_values[19]	auto[0]	auto[1]	auto[1]	5337196	1			T1	697		T2	432		T13	532
all_values[19]	auto[1]	auto[0]	auto[1]	78752	1			T1	44		T2	23		T14	19
all_values[19]	auto[1]	auto[1]	auto[1]	78445	1			T1	40		T2	18		T14	18
all_values[20]	auto[0]	auto[0]	auto[0]	2792606	1			T1	124		T2	73		T11	135
all_values[20]	auto[0]	auto[0]	auto[1]	5367963	1			T1	829		T2	376		T13	728
all_values[20]	auto[0]	auto[1]	auto[0]	589688	1			T1	106		T2	88		T13	31
all_values[20]	auto[0]	auto[1]	auto[1]	5299519	1			T1	783		T2	358		T13	337
all_values[20]	auto[1]	auto[0]	auto[1]	78970	1			T1	52		T2	18		T14	22
all_values[20]	auto[1]	auto[1]	auto[1]	78997	1			T1	38		T2	25		T14	18
all_values[21]	auto[0]	auto[0]	auto[0]	2794477	1			T1	155		T2	83		T11	135
all_values[21]	auto[0]	auto[0]	auto[1]	5342048	1			T1	764		T2	474		T13	594
all_values[21]	auto[0]	auto[1]	auto[0]	593067	1			T1	124		T2	58		T13	36
all_values[21]	auto[0]	auto[1]	auto[1]	5320556	1			T1	800		T2	283		T13	455
all_values[21]	auto[1]	auto[0]	auto[1]	78843	1			T1	40		T2	26		T14	16
all_values[21]	auto[1]	auto[1]	auto[1]	78752	1			T1	49		T2	14		T14	13
all_values[22]	auto[0]	auto[0]	auto[0]	2786541	1			T1	71		T2	91		T11	135
all_values[22]	auto[0]	auto[0]	auto[1]	5340165	1			T1	800		T2	366		T13	498
all_values[22]	auto[0]	auto[1]	auto[0]	588585	1			T1	66		T2	67		T13	16
all_values[22]	auto[0]	auto[1]	auto[1]	5335231	1			T1	906		T2	377		T13	511
all_values[22]	auto[1]	auto[0]	auto[1]	78567	1			T1	45		T2	24		T14	18
all_values[22]	auto[1]	auto[1]	auto[1]	78654	1			T1	44		T2	13		T14	20
all_values[23]	auto[0]	auto[0]	auto[0]	2790084	1			T1	118		T2	32		T11	135
all_values[23]	auto[0]	auto[0]	auto[1]	5375422	1			T1	750		T2	451		T13	671
all_values[23]	auto[0]	auto[1]	auto[0]	583116	1			T1	81		T2	19		T13	45
all_values[23]	auto[0]	auto[1]	auto[1]	5301803	1			T1	893		T2	400		T13	387
all_values[23]	auto[1]	auto[0]	auto[1]	79270	1			T1	44		T2	14		T14	19
all_values[23]	auto[1]	auto[1]	auto[1]	78048	1			T1	46		T2	22		T14	14
all_values[24]	auto[0]	auto[0]	auto[0]	2788566	1			T1	142		T2	80		T11	135
all_values[24]	auto[0]	auto[0]	auto[1]	5387521	1			T1	1027		T2	346		T13	367
all_values[24]	auto[0]	auto[1]	auto[0]	577432	1			T1	113		T2	72		T13	29
all_values[24]	auto[0]	auto[1]	auto[1]	5297151	1			T1	557		T2	403		T13	666
all_values[24]	auto[1]	auto[0]	auto[1]	79019	1			T1	57		T2	14		T14	14
all_values[24]	auto[1]	auto[1]	auto[1]	78054	1			T1	36		T2	23		T14	25
all_values[25]	auto[0]	auto[0]	auto[0]	2788322	1			T1	107		T2	56		T11	135
all_values[25]	auto[0]	auto[0]	auto[1]	5366784	1			T1	657		T2	349		T13	647
all_values[25]	auto[0]	auto[1]	auto[0]	580371	1			T1	113		T2	39		T13	29
all_values[25]	auto[0]	auto[1]	auto[1]	5314631	1			T1	970		T2	452		T13	392
all_values[25]	auto[1]	auto[0]	auto[1]	78969	1			T1	35		T2	17		T14	19
all_values[25]	auto[1]	auto[1]	auto[1]	78666	1			T1	50		T2	25		T14	18
all_values[26]	auto[0]	auto[0]	auto[0]	2787117	1			T1	115		T2	117		T11	135
all_values[26]	auto[0]	auto[0]	auto[1]	5354518	1			T1	885		T2	396		T13	583
all_values[26]	auto[0]	auto[1]	auto[0]	581392	1			T1	78		T2	59		T13	55
all_values[26]	auto[0]	auto[1]	auto[1]	5327361	1			T1	753		T2	323		T13	448
all_values[26]	auto[1]	auto[0]	auto[1]	79246	1			T1	50		T2	24		T14	16
all_values[26]	auto[1]	auto[1]	auto[1]	78109	1			T1	51		T2	19		T14	29
all_values[27]	auto[0]	auto[0]	auto[0]	2790754	1			T1	140		T2	56		T11	135
all_values[27]	auto[0]	auto[0]	auto[1]	5349003	1			T1	792		T2	397		T13	373
all_values[27]	auto[0]	auto[1]	auto[0]	582715	1			T1	88		T2	17		T13	44
all_values[27]	auto[0]	auto[1]	auto[1]	5327878	1			T1	822		T2	429		T13	670
all_values[27]	auto[1]	auto[0]	auto[1]	78943	1			T1	43		T2	19		T14	21
all_values[27]	auto[1]	auto[1]	auto[1]	78450	1			T1	47		T2	20		T14	19
all_values[28]	auto[0]	auto[0]	auto[0]	2788241	1			T1	124		T2	91		T11	135
all_values[28]	auto[0]	auto[0]	auto[1]	5362621	1			T1	780		T2	449		T13	483
all_values[28]	auto[0]	auto[1]	auto[0]	588453	1			T1	147		T2	32		T13	48
all_values[28]	auto[0]	auto[1]	auto[1]	5310722	1			T1	784		T2	329		T13	564
all_values[28]	auto[1]	auto[0]	auto[1]	78992	1			T1	48		T2	25		T14	15
all_values[28]	auto[1]	auto[1]	auto[1]	78714	1			T1	49		T2	12		T14	21
all_values[29]	auto[0]	auto[0]	auto[0]	2797139	1			T1	104		T2	73		T11	135
all_values[29]	auto[0]	auto[0]	auto[1]	5343906	1			T1	808		T2	355		T13	497
all_values[29]	auto[0]	auto[1]	auto[0]	576043	1			T1	123		T2	53		T13	17
all_values[29]	auto[0]	auto[1]	auto[1]	5333180	1			T1	804		T2	425		T13	587
all_values[29]	auto[1]	auto[0]	auto[1]	79205	1			T1	47		T2	16		T14	10
all_values[29]	auto[1]	auto[1]	auto[1]	78270	1			T1	46		T2	16		T14	27
all_values[30]	auto[0]	auto[0]	auto[0]	2785700	1			T1	142		T2	55		T11	135
all_values[30]	auto[0]	auto[0]	auto[1]	5341756	1			T1	815		T2	409		T13	360
all_values[30]	auto[0]	auto[1]	auto[0]	580561	1			T1	58		T2	26		T13	48
all_values[30]	auto[0]	auto[1]	auto[1]	5342322	1			T1	835		T2	404		T13	711
all_values[30]	auto[1]	auto[0]	auto[1]	78951	1			T1	38		T2	19		T14	26
all_values[30]	auto[1]	auto[1]	auto[1]	78453	1			T1	44		T2	25		T14	13
all_values[31]	auto[0]	auto[0]	auto[0]	2799232	1			T1	107		T2	76		T11	135
all_values[31]	auto[0]	auto[0]	auto[1]	5334857	1			T1	890		T2	427		T13	457
all_values[31]	auto[0]	auto[1]	auto[0]	590049	1			T1	74		T2	62		T13	34
all_values[31]	auto[0]	auto[1]	auto[1]	5325968	1			T1	777		T2	330		T13	562
all_values[31]	auto[1]	auto[0]	auto[1]	79370	1			T1	43		T2	27		T14	24
all_values[31]	auto[1]	auto[1]	auto[1]	78267	1			T1	41		T2	16		T14	9

User Defined Cross Bins for intr_test_cg_cc

Excluded/Illegal bins

NAME	COUNT	STATUS
test_1_state_0	0	Illegal