Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8183350 |
1 |
|
|
T1 |
1138 |
|
T2 |
497 |
|
T11 |
135 |
| auto[1] |
6024393 |
1 |
|
|
T1 |
794 |
|
T2 |
441 |
|
T13 |
483 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
11753515 |
1 |
|
|
T1 |
1266 |
|
T2 |
542 |
|
T11 |
135 |
| auto[1] |
2454228 |
1 |
|
|
T1 |
666 |
|
T2 |
396 |
|
T13 |
236 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8220238 |
1 |
|
|
T1 |
961 |
|
T2 |
480 |
|
T11 |
135 |
| auto[1] |
5987505 |
1 |
|
|
T1 |
971 |
|
T2 |
458 |
|
T13 |
468 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1766493 |
1 |
|
|
T1 |
156 |
|
T2 |
24 |
|
T13 |
125 |
| auto[1] |
auto[0] |
auto[1] |
1228694 |
1 |
|
|
T1 |
349 |
|
T2 |
200 |
|
T13 |
125 |
| auto[1] |
auto[1] |
auto[0] |
1766784 |
1 |
|
|
T1 |
149 |
|
T2 |
38 |
|
T13 |
107 |
| auto[1] |
auto[1] |
auto[1] |
1225534 |
1 |
|
|
T1 |
317 |
|
T2 |
196 |
|
T13 |
111 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |